10.1 Layout Guidelines

Layout of the application board significantly impacts the analog performance of the TRF372017 device. Noise and high-speed signals must be prevented from leaking onto power-supply pins or analog signals. Follow these recommendations:

1. Place supply decoupling capacitors physically close to the device, on the same side of the board. Each supply pin must be isolated with a ferrite bead.
2. Maintain a continuous ground plane in the vicinity of the device and as return paths for all high-speed signal lines. Place reference plane vias or decoupling capacitors near any signal line reference transition.
3. The pad on the bottom of the device must be electrically grounded. Connect GND pins directly to the pad on the surface layer. Connect the GND pins and pad directly to surface ground where possible.
4. Power planes must not overlap each other or high-speed signal lines.
5. Isolate REF_IN routing from loop filter lines, control lines, and other high-speed lines.

See Figure 95 for an example of critical component layout (for the top PCB layer).

10.2 Layout Example

Figure 95. Critical Layout of the TRF372017 EVM Board