ZHCS762F
December 2011 – May 2017
TRF7963A
PRODUCTION DATA.
1
器件概述
1.1
特性
1.2
应用
1.3
说明
1.4
应用框图
2
修订历史记录
3
Device Characteristics
3.1
Related Products
4
Terminal Configuration and Functions
4.1
Pin Diagrams
4.2
Signal Descriptions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Electrical Characteristics
5.5
Thermal Resistance Characteristics
5.6
Switching Characteristics
6
Detailed Description
6.1
Functional Block Diagram
6.2
Power Supplies
6.3
Supply Arrangements
6.4
Supply Regulator Settings
6.5
Power Modes
6.6
Receiver – Analog Section
6.6.1
Main and Auxiliary Receiver
6.6.2
Receiver Gain and Filter Stages
6.7
Receiver – Digital Section
6.7.1
Received Signal Strength Indicator (RSSI)
6.7.1.1
Internal RSSI – Main and Auxiliary Receivers
6.7.1.2
External RSSI
6.8
Oscillator Section
6.9
Transmitter - Analog Section
6.10
Transmitter - Digital Section
6.11
Transmitter – External Power Amplifier or Subcarrier Detector
6.12
Communication Interface
6.12.1
General Introduction
6.12.2
FIFO Operation
6.12.3
Parallel Interface Mode
6.12.4
Reception of Air Interface Data
6.12.5
Data Transmission to MCU
6.12.6
Serial Interface Communication (SPI)
6.12.6.1
Serial Interface Mode Without Slave Select (SS)
6.12.6.2
Serial Interface Mode With Slave Select (SS)
6.12.7
Direct Mode
6.13
Direct Commands from MCU to Reader
6.13.1
Command Codes
6.13.2
Reset FIFO (0x0F)
6.13.3
Transmission With CRC (0x11)
6.13.4
Transmission Without CRC (0x10)
6.13.5
Block Receiver (0x16)
6.13.6
Enable Receiver (0x17)
6.13.7
Test Internal RF (RSSI at RX Input With TX On) (0x18)
6.13.8
Test External RF (RSSI at RX Input With TX Off) (0x19)
6.13.9
Register Preset
6.14
Register Description
6.14.1
Register Overview
6.14.1.1
Main Configuration Registers
6.14.1.1.1
Chip Status Control Register (0x00)
6.14.1.1.2
ISO Control Register (0x01)
6.14.1.2
Protocol Subsetting Registers
6.14.1.2.1
ISO14443B TX Options Register (0x02)
6.14.1.2.2
ISO14443A High-Bit-Rate and Parity Options Register (0x03)
6.14.1.2.3
TX Pulse Length Control Register (0x06)
6.14.1.2.4
RX No Response Wait Time Register (0x07)
6.14.1.2.5
RX Wait Time Register (0x08)
6.14.1.2.6
Modulator and SYS_CLK Control Register (0x09)
6.14.1.2.7
RX Special Setting Register (0x0A)
6.14.1.2.8
Regulator and I/O Control Register (0x0B)
6.14.1.3
Status Registers
6.14.1.3.1
IRQ Status Register (0x0C)
6.14.1.3.2
Collision Position and Interrupt Mask Registers (0x0D and 0x0E)
6.14.1.3.3
RSSI Levels and Oscillator Status Register (0x0F)
6.14.1.4
Test Registers
6.14.1.4.1
Test Register (0x1A)
6.14.1.4.2
Test Register (0x1B)
6.14.1.5
FIFO Control Registers
6.14.1.5.1
FIFO Status Register (0x1C)
6.14.1.5.2
TX Length Byte1 Register (0x1D) and TX Length Byte2 Register (0x1E)
7
Applications, Implementation, and Layout
7.1
TRF7963A Reader System Using SPI With SS Mode
7.1.1
General Application Considerations
7.1.2
Schematic
7.2
System Design
7.2.1
Layout Considerations
7.2.2
Impedance Matching TX_Out (Pin 5) to 50 Ω
7.2.3
Reader Antenna Design Guidelines
8
器件和文档支持
8.1
入门和后续步骤
8.2
器件命名规则
8.3
工具和软件
8.4
文档支持
8.5
社区资源
8.6
商标
8.7
静电放电警告
8.8
出口管制提示
8.9
Glossary
9
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
RHB|32
MPQF130D
散热焊盘机械数据 (封装 | 引脚)
RHB|32
QFND029X
订购信息
zhcs762f_oa
zhcs762f_pm
1.1
特性
完全集成了
ISO/IEC 14443 A 和 B、NFC 论坛器件类型 1 至 4 和 FeliCa™
的协议处理
输入电压范围:2.7VDC 至 5.5VDC
可编程输出功率:
+20 dBm (100 mW) 或者 +23 dBm (200 mW)
可编程 I/O 电压电平:
1.8 VDC 至 5.5 VDC
可编程系统时钟频率输出 (RF,RF/2,RF/4)
可编程调制深度
具有针对“读取漏洞”消除和邻近读取器系统或者周围环境频带内噪声检测的具有接收信号强度指示器 (RSSI) 的双接收器架构
适用于超低功耗系统设计的可编程功耗模式(关断时 < 0.5µA)
并行或者串行外设接口 (SPI) 接口
用于微控制器电源的集成型电压稳压器
温度范围:
–25°C 至 85°C
32 引脚 QFN 封装 (5mm × 5mm) (RHB)
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