米6体育平台手机版

ZHCSIS1G January 2005 – January 2019 TS3A5017

PRODUCTION DATA.

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

PW|16
DBQ|16
RGY|16
D|16
DGV|16
RSV|16

散热焊盘机械数据 (封装 | 引脚)

RGY|16
- QFND040P

订购信息

6.6 Electrical Characteristics for 2.5-V Supply

V₊ = 2.3 V to 2.7 V, T_A = –40°C to 85°C (unless otherwise noted)⁽¹⁾

PARAMETER		TEST CONDITIONS		T_A	V₊	MIN	TYP	MAX	UNIT
Analog Switch
V_D, V_S	Analog signal range					0		V₊	V
r_on	ON-state resistance	0 ≤ V_S ≤ V₊, I_D = –24 mA,	Switch ON, see Figure 12	25°C	2.3 V		20.5	22	Ω
r_on	ON-state resistance	0 ≤ V_S ≤ V₊, I_D = –24 mA,	Switch ON, see Figure 12	Full	2.3 V			24	Ω
Δr_on	ON-state resistance match between channels	V_S = 1.6 V, I_D = –24 mA,	Switch ON, see Figure 12	25°C	2.3 V		1	2	Ω
Δr_on	ON-state resistance match between channels	V_S = 1.6 V, I_D = –24 mA,	Switch ON, see Figure 12	Full	2.3 V			3	Ω
r_on(flat)	ON-state resistance flatness	0 ≤ V_S ≤ V₊, I_D = –24 mA,	Switch ON, see Figure 12	25°C	2.3 V		16	18	Ω
r_on(flat)	ON-state resistance flatness	0 ≤ V_S ≤ V₊, I_D = –24 mA,	Switch ON, see Figure 12	Full	2.3 V			20	Ω
I_S(OFF)	S OFF leakage current	V_S = 0.5 V, V_D = 2.2 V, or V_S = 2.2 V, V_D = 0.5 V,	Switch OFF, see Figure 13	25°C	2.7 V	–0.1	0.05	0.1	μA
I_S(OFF)		V_S = 0.5 V, V_D = 2.2 V, or V_S = 2.2 V, V_D = 0.5 V,		Full	2.7 V	–0.2		0.2
I_SPWR(OFF)		V_S = 0 to 2.7 V, V_D = 2.7 V to 0,		25°C	0 V	–1	0.5	1
I_SPWR(OFF)		V_S = 0 to 2.7 V, V_D = 2.7 V to 0,		Full	0 V	–5		5
I_D(OFF)	D OFF leakage current	V_S = 0.5 V, V_D = 2.2 V, or V_S = 2.2 V, V_D = 0.5V,	Switch OFF, see Figure 13	25°C	2.7 V	–0.1	0.05	0.1	μA
I_D(OFF)		V_S = 0.5 V, V_D = 2.2 V, or V_S = 2.2 V, V_D = 0.5V,		Full	2.7 V	–0.2		0.2
I_DPWR(OFF)		V_D = 0 to 2.7 V, V_S = 2.7 V to 0,		25°C	0 V	–1	0.5	1
I_DPWR(OFF)		V_D = 0 to 2.7 V, V_S = 2.7 V to 0,		Full	0 V	–5		5
I_S(ON)	S ON leakage current	V_S = 0.5 V, V_D = Open, or V_S = 2.2 V, V_D = Open,	Switch ON, see Figure 14	25°C	2.7 V	–0.1	0.05	0.1	μA
I_S(ON)	S ON leakage current	V_S = 0.5 V, V_D = Open, or V_S = 2.2 V, V_D = Open,	Switch ON, see Figure 14	Full	2.7 V	–0.2		0.2	μA
I_D(ON)	D ON leakage current	V_D = 0.5 V, V_S = Open, or V_D = 2.2 V, V_S = Open,	Switch ON, see Figure 14	25°C	2.7 V	–0.1	0.05	0.1	μA
I_D(ON)	D ON leakage current	V_D = 0.5 V, V_S = Open, or V_D = 2.2 V, V_S = Open,	Switch ON, see Figure 14	Full	2.7 V	–0.2		0.2	μA
Digital Control Inputs (IN1, IN2, EN)⁽²⁾
V_IH	Input logic high			Full		1.7		V₊	V
V_IL	Input logic low			Full		0		0.7	V
I_IH, I_IL	Input leakage current	V_I = V₊ or 0		25°C	2.7 V	–1	0.05	1	μA
I_IH, I_IL	Input leakage current	V_I = V₊ or 0		Full	2.7 V	–1		1	μA
Q_C	Charge injection	V_GEN = 0, R_GEN = 0, C_L = 0.1 nF,	See Figure 21	25°C	2.5 V				pC
C_S(OFF)	S OFF capacitance	V_S = V₊ or GND, Switch OFF,	See Figure 15	25°C	2.5 V		4.5		pF
C_D(OFF)	D OFF capacitance	V_D = V₊ or GND, Switch OFF,	See Figure 15	25°C	2.5 V		18.5		pF
C_S(ON)	S ON capacitance	V_S = V₊ or GND, Switch ON,	See Figure 15	25°C	2.5 V		24		pF
C_D(ON)	D ON capacitance	V_D = V₊ or GND, Switch ON,	See Figure 15	25°C	2.5 V		24		pF
C_I	Digital input capacitance	V_I = V₊ or GND,	See Figure 15	25°C	2.5 V		2		pF
BW	Bandwidth	R_L = 50 Ω, Switch ON,	See Figure 17	25°C	2.5 V		165		MHz
O_ISO	OFF isolation	R_L = 50 Ω, f = 1 MHz,	See Figure 18	25°C	2.5 V		–69		dB
X_TALK	Crosstalk	R_L = 50 Ω, f = 1 MHz,	See Figure 19	25°C	2.5 V		–69		dB
X_TALK(ADJ)	Crosstalk adjacent	R_L = 50 Ω, f = 1 MHz,	See Figure 20	25°C	2.5 V		–74		dB
THD	Total harmonic distortion	R_L = 600 Ω, C_L = 50 pF,	f = 20 Hz to 20 kHz, see Figure 22	25°C	2.5 V		0.29%
Supply
I₊	Positive supply current	V_I = V₊ or GND,	Switch ON or OFF	25°C	2.7 V		2.5	7	μA
I₊	Positive supply current	V_I = V₊ or GND,	Switch ON or OFF	Full	2.7 V			10	μA

(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum

(2) All unused digital inputs of the device must be held at V₊or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.