A. C_L includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r ≤ 2.5 ns, t_f ≤ 2.5 ns.

D. The outputs are measured one at a time, with one transition per measurement.

E. t_PLZ and t_PHZ are the same as t_dis.

F. t_PLZ and t_PHH are the same as t_en.

Figure 5. Test Circuit and Voltage Waveforms

A. C_L includes probe and jig capacitance.

B. Switch is ON during the measurement of t_sk(p), that is, voltage at E = 0 and S = V_CC or GND.

Figure 6. Test Circuit and Voltage Waveforms

A. C_L includes probe and jig capacitance.

Figure 7. Test Circuit for Frequency Response (BW)

Frequency response is measured at the output of the ON channel. For example, when V_S = 0, V_E = 0, and YA is the input, the output is measured at IA₀. All unused analog I/O ports are left open.

HP8753ES Setup

• Average = 4
• RBW = 3 kHz
• V_BIAS = 0.35 V
• ST = 2 s
• P1 = 0 dBM

A. C_L includes probe and jig capacitance.

B. A 50-Ω termination resistor is needed to match the loading of the network analyzer

Figure 8. Test Circuit for Crosstalk (X_TALK)

Crosstalk is measured at the output of the nonadjacent ON channel. For example, when V_S = 0, V_E = 0, and YA is the input, the output is measured at IB₀. All unused analog input (Y) ports are connected to GND, and output (I) ports are connected to GND through 50-Ω pulldown resistors.

HP8753ES Setup

• Average = 4
• RBW = 3 kHz
• V_BIAS = 0.35 V
• ST = 2 s
• P1 = 0 dBM

A. C_L includes probe and jig capacitance.

B. A 50-Ω termination resistor is needed to match the loading of the network analyzer

Figure 9. Test Circuit for OFF Isolation (O_IRR)

OFF isolation is measured at the output of the OFF channel. For example, when V_S = V_CC, V_E = 0, and YA is the input, the output is measured at IA₀. All unused analog input (Y) ports are left open, and output (I) ports are connected to GND through 50-Ω pulldown resistors.

HP8753FS Setup

• Average = 4
• RBW = 3 kHz
• V_BIAS = 0.35 V
• ST = 2 s
• P1 = 0 dBM