ZHCSX92G December   2008  – October 2024 TS3USB30E

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Dynamic Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

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Switching Characteristics

over operating range, TA = –40°C to 85°C, VCC = 3.3V ±10%, GND = 0V
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
tpd Propagation delay(2) (3) RL = 50Ω, CL = 5pF, At 480Mbps, 
See Figure 6-5
0.25 ns
tON Line enable time, SEL to D, nD RL = 50Ω, CL = 5pF,
See Figure 6-1
30 ns
tOFF Line disable time, SEL to D, nD RL = 50Ω, CL = 5pF,
See Figure 6-1
25 ns
tON Line enable time, OE to D, nD RL = 50Ω, CL = 5pF,
See Figure 6-1
30 ns
tOFF Line disable time, OE to D, nD RL = 50Ω, CL = 5pF,
See Figure 6-1
25 ns
tSK(O) Output skew between center port to any other port(2) RL = 50Ω, CL = 5pF,
See Figure 6-6
50 ps
tSK(P) Skew between opposite transitions of the same output
(tPHL – tPLH)(2)
RL = 50Ω, CL = 5pF,
See Figure 6-6
20 ps
tJ Total jitter(2) RL = 50Ω, CL = 5pF,
tR = tF = 500ps at 480Mbps (PRBS = 215 – 1)
20 ps
For minimum or maximum conditions, use the appropriate value specified under Electrical Characteristics for the applicable device type.
Specified by design
The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 10pF load. Since this time constant is much smaller than the rise/fall times of typical driving signals, bus switch adds very little propagational delay to the system. Propagational delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.