SCDS242E July 2007 – August 2016 TS3USB31
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VCC | Supply voltage | –0.5 | 7 | V | |
| VIN | Control input voltage(2)(3) | –0.5 | 7 | V | |
| VI/O | Switch I/O voltage (2)(3)(4) | HSD+, HSD– | –0.5 | VCC + 0.3 | V |
| D+, D– when VCC > 0 | –0.5 | VCC + 0.3 | |||
| D+, D– when VCC = 0 | 5.25 | ||||
| IIK | Control input clamp current | VIN < 0 | –50 | mA | |
| II/OK | I/O port clamp current | VI/O < 0 | –50 | mA | |
| II/O | ON-state switch current(5) | ±64 | mA | ||
| Continuous current through VCC or GND | ±100 | mA | |||
| Tstg | Storage temperature | –65 | 150 | °C | |
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4) VI and VO are used to denote specific conditions for VI/O.
(5) II and IO are used to denote specific conditions for II/O.
6.2 ESD Ratings
| VALUE | UNIT | |||
|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±6000 | V |
| Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 | |||
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VCC | Supply voltage | 3 | 4.3 | V | |
| VIH | High-level control input voltage | VCC = 3 V to 3.6 V | 1.3 | V | |
| VCC = 4.3 V | 1.7 | ||||
| VIL | Low-level control input voltage | VCC = 3 V to 3.6 V | 0.5 | V | |
| VCC = 4.3 V | 0.7 | ||||
| VI/O | Data input/output voltage | 0 | VCC | V | |
| TA | Operating free-air temperature | –40 | 85 | °C | |
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs (SCBA004).
6.4 Thermal Information
| THERMAL METRIC(1) | TS3USB31 | UNIT | |
|---|---|---|---|
| RSE (UQFN) | |||
| 8 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 115.5 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 38.4 | °C/W |
| RθJB | Junction-to-board thermal resistance | 65.3 | °C/W |
| ψJT | Junction-to-top characterization parameter | 5.4 | °C/W |
| ψJB | Junction-to-board characterization parameter | 67.9 | °C/W |
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
6.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)(1)| PARAMETER | TEST CONDITIONS | MIN | TYP(2) | MAX | UNIT | ||||
|---|---|---|---|---|---|---|---|---|---|
| VIK | Input Clamp Voltage | VCC = 3 V, II = –18 mA | –1.2 | V | |||||
| IIN | Control inputs | VCC = 4.3 V or 0V, VIN = 0 to 4.3 V, | ±1 | µA | |||||
| IOZ(3) | VCC = 4.3 V, VO = 0 to 3.6 V, VI = 0, Switch OFF | ±1 | µA | ||||||
| IOFF | D+ and D– | VCC = 0 V, VO = 0 V to 4.3 V, VI = 0, VIN = VCC or GND | ±2 | µA | |||||
| ICC | VCC = 4.3 V, II/O = 0, Switch ON or OFF | 1 | µA | ||||||
| ΔICC(4) | Control inputs | VCC = 4.3 V, VIN = 2.6 V | 10 | µA | |||||
| Cin | Control inputs | VCC = 0 V, VIN = VCC or GND | 1 | pF | |||||
| Cio(OFF) | Off-state Input/Output Capacitance | VCC = 3.3 V, VI/O = 3.3 V or 0, Switch OFF | 2 | pF | |||||
| Cio(ON) | On-state Input/Output Capacitance | VCC = 3.3 V, VI/O = 3.3 V or 0, Switch ON | 6 | pF | |||||
| ron(5) | On-State Resistance | VCC = 3 V, VI = 0.4 V, IO = –8 mA | 6 | 10 | Ω | ||||
| Δron | Channel Match | VCC = 3 V, VI = 0.4 V, IO = –8 mA | 0.35 | Ω | |||||
| ron(flat) | On-State Resistance Flatness | VCC = 3 V, VI = 0 V or 1 V, IO = –8 mA | 2 | Ω | |||||
(1) VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins.
(2) All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
(3) For I/O ports, the parameter IOZ includes the input leakage current.
(4) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
(5) Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals.
6.6 Dynamic Electrical Characteristics
over operating range, TA = –40°C to 85°C, VCC = 3.3 V ± 10%, GND = 0 V| PARAMETER | TEST CONDITIONS | TYP(1) | UNIT | |
|---|---|---|---|---|
| XTALK | Crosstalk | RL = 50 Ω, f = 240 MHz, See Figure 6 | –53 | dB |
| OIRR | OFF isolation | RL = 50 Ω, f = 240 MHz, See Figure 5 | –30 | dB |
| BW | Bandwidth (–3 dB) | RL = 50 Ω, CL = 5 pF, See Figure 7 | 1220 | MHz |
(1) For Max or Min conditions, use the appropriate value specified under Electrical Characteristics for the applicable device type.
6.7 Switching Characteristics
over operating range, TA = –40°C to 85°C, VCC = 3.3 V ± 10%, GND = 0 V| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tpd | Propagation delay(2)(3) | RL = 50 Ω, CL = 5 pF, See Figure 8 |
0.25 | ns | ||
| tON | Line enable time, OE to D, nD | RL = 50 Ω, CL = 5 pF, See Figure 4 |
30 | ns | ||
| tOFF | Line disable time, OE to D, nD | RL = 50 Ω, CL = 5 pF, See Figure 4 |
25 | ns | ||
| tSK(O) | Output skew between ports(2) | RL = 50 Ω, CL = 5 pF, See Figure 9 |
50 | ps | ||
| tSK(P) | Skew between opposite transitions of the same output (tPHL – tPLH)(2) |
RL = 50 Ω, CL = 5 pF, See Figure 9 |
20 | ps | ||
| tJ | Total jitter(2) | RL = 50 Ω, CL = 5 pF, tR = tF = 500 ps at 480 Mbps (PRBS = 215 – 1) |
200 | ps | ||
(1) For Max or Min conditions, use the appropriate value specified under Electrical Characteristics for the applicable device type.
(2) Specified by design
(3) The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25 ns for 10-pF load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side.
6.8 Typical Characteristics
