ZHCSHL5C February   2018  – September 2019 TS3USBCA4

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      简化原理图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (3 V ≤ VCC ≤ 3.6 V)
    6. 6.6  Electrical Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    7. 6.7  Switching Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    8. 6.8  Timing Requirements (3 V ≤ VCC ≤ 3.6 V)
    9. 6.9  Timing Requirements (2.4 V ≤ VCC ≤ 5.5 V)
    10. 6.10 Timing Diagrams
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Audio Path
      2. 8.3.2 High-Speed Paths
      3. 8.3.3 3-level Input
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
    6. 8.6 Register Maps
      1. 8.6.1 TS3USBCA4 Registers
        1. 8.6.1.1 Revision_ID Register (Offset = 9h) [reset = 0h]
          1. Table 8. Revision_ID Register Field Descriptions
        2. 8.6.1.2 General_1 Register (Offset = Ah) [reset = 0h]
          1. Table 9. General_1 Register Field Descriptions
        3. 8.6.1.3 General_2 Register (Offset = Bh) [reset = 0h]
          1. Table 10. General_2 Register Field Descriptions
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 接收文档更新通知
    2. 12.2 支持资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

High-Speed Paths

The TS3USBCA4 supports three (TS3USBCA420) or two (TS3USBCA410) high-speed paths between the SBU1 and SBU2 pins on one side of the switch. The LnAp/LnAn, LnBp/LnBn or LnCp/LnCn pins on the other side of the switch. The high-speed paths are identical by design. All high-speed paths have a 500-MHz bandwidth, a low ON-state resistance, and low additive random jitter for signal integrity. For different USB Type-C plug orientations, the polarity of each high-speed lane can be flipped through the I2C interface in TS3USBCA420, or though either the I2C interface or pin control in TS3USBCA410.