ZHCSTF0C February 2019 – August 2024 TUSB2E22
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
CROSS pin will control the orientation of the integrated cross bar mux.
Upon deassertion of RESETB followed by internally generated reset signal and 1ms delay, CROSS pin is sampled and latched.
The system needs to make sure that CROSS meets t_su_CROSS and t_hd_CROSS with respect to power supply ramp and RESETB deassertion per Section 8.3.
Changes to the state of the CROSS input while RESETB is high will be ignored.
CROSS = 0 | CROSS = 1 | |
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eUSB0 (eDP0, eDN0) | USBA (DPA, DNA) | USBB (DPB, DNB) |
eUSB1 (eDP1, eDN1) | USBB (DPB, DNB) | USBA (DPA, DNA) |