7.3.15 Interrupts

The TUSB422 asserts the INT_N pin low anytime an unmasked event occurs. Upon assertion of the interrupt, the TCPM should read the Alert Registers to determine the reason for interrupt. Upon reading the Alert register, the TCPM should clear the interrupt by writing a 1’b1 to the appropriate field in the Alert register.

If the FAULT flag is set in the Alert register, the TCPM must first read the Fault Status register to determine reason for fault. Then clear the appropriate field in the Fault Status register by writing a 1’b1. Once all fields in Fault Status register are cleared, the TCPM can then clear the flag in the Alert Register by writing a 1’b1.

The TUSB422 also has Vendor Defined Interrupt registers which is not part of the USB TCPC specification. These vendor defined interrupts are masked by default. Software can enable vendor interrupts by setting the appropriate bit in the Vendor Interrupts Mask Register and setting the VENDOR_IRQ_MASK field in the Alert Mask register.