ZHCSEG8F December 2015 – December 2023 TUSB542
PRODUCTION DATA
For this design example, use the design parameters shown in Design Parameters.
The configured value depends on the physical channel (PCB layout) Equalization 0, 3, 6, 9dB (5Gbps) The configured value depends on the physical channel (PCB layout) de-emphasis 0, –3.5, –6dB The configured value depends on the physical channel (PCB layout) Differential impedance 72 - 120 Ω
| PARAMETER | VALUE | COMMENT |
|---|---|---|
| VDD18 | 1.8V | |
| AC Coupling Capacitors for SS signals | 100 nF | 75-200 nF range allowed. TUSB542 biases both input and output common mode voltage, hence ac-coupling caps as required on both sides. Note: TX pairs need to be biased at the connector. |
| Pull-up/down resistor to control CNF pins | 4.7kΩ | |
| Input voltage range | 100 mV to 1200 mV | |
| Output voltage range | 900 mV to 1100 mV |