ZHCSEG8F December   2015  – December 2023 TUSB542

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics, Power Supply Currents
    6. 5.6  Electrical Characteristics, DC
    7. 5.7  Electrical Characteristics, Dynamic
    8. 5.8  Electrical Characteristics, AC
    9. 5.9  Timing Requirements
    10. 5.10 Switching Characteristics
    11. 5.11 Typical Characteristics
      1. 5.11.1 1-Inch Pre Channel
      2. 5.11.2 24-Inch Pre Channel
      3. 5.11.3 32-Inch Pre Channel
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Receiver Equalization
      2. 6.3.2 De-Emphasis Control and Output Swing
      3. 6.3.3 Automatic LFPS Detection
      4. 6.3.4 Automatic Power Management
    4. 6.4 Device Functional Modes
      1. 6.4.1 Disconnect Mode
      2. 6.4.2 U Modes
        1. 6.4.2.1 U0 Mode
        2. 6.4.2.2 U2/U3 Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications, USB Type-C Port SS MUX
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Typical Application: Switching USB SS Host or Device Ports
      1. 7.3.1 Design Requirements
      2. 7.3.2 Detailed Design Procedure
      3. 7.3.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 接收文档更新通知
    2. 8.2 支持资源
    3. 8.3 Trademarks
    4. 8.4 静电放电警告
    5. 8.5 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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7.2.2 Detailed Design Procedure

Figure 7-2 shows an example implementation of an USB Type-C DRP port using TUSB542. Texas Instruments TUSB322 is shown here as channel configuration (CC) controller. Note: connections for CNFG pins of TUSB542 is an example only. The connection of the CNFG pins is application dependent; refer to Table 6-2, where the user can find the available settings.

It is recommended to run an overall system signal integrity analysis, to estimate the channel loss and configure the re-driver. It is also recommended to have pull-up and pull-down option on the configuration pins for debug and testing purposes.

The signal integrity analysis must determine the following:

  • Equalization (EQ) setting
  • De-emphasis (DE) setting
  • Output swing amplitude (OS) setting

The equalization must be set based on the insertion loss in the pre-channel (channel before the TUSB542 device). The input voltage to the device is able to have a large range because of the receiver sensitivity and the available EQ settings.

The de-emphasis setting must be set based on the length and characteristics of the post channel (channel after the TUSB542 device).

GUID-B4F734D8-D856-495D-9CA5-0E8111F1007C-low.svgFigure 7-2 USB-C DRP Implementation Using TUSB542 and TUSB322/TUSB321
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