ZHCSGH4B June 2017 – May 2019 TUSB546A-DCI
PRODUCTION DATA.
The TUSB546A-DCI is in I2C mode when I2C_EN is not equal to “0”. The same configurations defined in GPIO mode are also available in I2C mode. The TUSB546A-DCI USB3.1 and DisplayPort configuration is controlled based on Table 5. The AUXp or AUXn to SBU1 or SBU2 mapping control is based on Table 6.
| REGISTERS | TUSB546A-DCI CONFIGURATION | VESA DisplayPort ALT MODE
DFP_D CONFIGURATION |
||
|---|---|---|---|---|
| CTLSEL1 | CTLSEL0 | FLIPSEL | ||
| 0 | 0 | 0 | Power Down | — |
| 0 | 0 | 1 | Power Down | — |
| 0 | 1 | 0 | One Port USB 3.1 - No Flip | — |
| 0 | 1 | 1 | One Port USB 3.1 – With Flip | — |
| 1 | 0 | 0 | 4 Lane DP - No Flip | C and E |
| 1 | 0 | 1 | 4 Lane DP – With Flip | C and E |
| 1 | 1 | 0 | One Port USB 3.1 + 2 Lane DP- No Flip | D and F |
| 1 | 1 | 1 | One Port USB 3.1 + 2 Lane DP– With Flip | D and F |
| REGISTERS | MAPPING | ||
|---|---|---|---|
| AUX_SBU_OVR | CTLSEL1 | FLIPSEL | |
| 00 | 1 | 0 | AUXp → SBU1
AUXn → SBU2 |
| 00 | 1 | 1 | AUXp → SBU2
AUXn → SBU1 |
| 00 | 1 | X | Open |
| 01 | X | X | AUXp → SBU1
AUXn → SBU2 |
| 10 | X | X | AUXp → SBU2
AUXn → SBU1 |
| 11 | X | X | Open |