ZHCSGZ9G October 2017 – November 2022 TUSB564
PRODUCTION DATA
The TUSB564 is in I2C mode when I2C_EN is not equal to “0”. The same configurations defined in GPIO mode are also available in I2C mode. The TUSB564 USB3.1 and DisplayPort configuration is controlled based on Table 8-5. The AUXp or AUXn to SBU1 or SBU2 mapping control is based on Table 8-6.
| REGISTERS | CONFIGURATION | VESA DisplayPort ALT MODE UFP_D CONFIGURATION | ||
|---|---|---|---|---|
| CTLSEL1 | CTLSEL0 | FLIPSEL | ||
| 0 | 0 | 0 | Power Down | — |
| 0 | 0 | 1 | Power Down | — |
| 0 | 1 | 0 | One Port USB 3.1 - No Flip | — |
| 0 | 1 | 1 | One Port USB 3.1 – With Flip | — |
| 1 | 0 | 0 | 4 Lane DP - No Flip | C |
| 1 | 0 | 1 | 4 Lane DP – With Flip | C |
| 1 | 1 | 0 | One Port USB 3.1 + 2 Lane DP- No Flip | D |
| 1 | 1 | 1 | One Port USB 3.1 + 2 Lane DP– With Flip | D |
| REGISTERS | MAPPING | ||
|---|---|---|---|
| AUX_SBU_OVR | CTLSEL1 | FLIPSEL | |
| 00 | 1 | 0 | SBU1 → AUXn SBU2 → AUXp |
| 00 | 1 | 1 | SBU2 → AUXn SBU1 → AUXp |
| 00 | 0 | X | Open |
| 01 | X | X | SBU1 → AUXn SBU2 → AUXp |
| 10 | X | X | SBU2 → AUXn SBU1 → AUXp |
| 11 | X | X | Open |