ZHCSKL2A December 2019 – May 2022 TUSS4470
PRODUCTION DATA
Figure 7-5 shows the internal structure for driving an ultrasonic transducer connected directly to the device output using an H-bridge output stage. This configuration drives 2 × VVDRV as the peak-to-peak voltage across the transducer. The voltage on VDRV pin can be set as described in the Section 7.3.1 section.
Figure 7-5 shows the most common application case for the TUSS4470 device, in which the output driver pulses the two half-bridges out-of-phase. It is also possible to use the driver in half-bridge mode by setting the HALF_BRG_MODE bit. In this mode, only VVDRV is applied across the transducer. This mode is useful for transducers where one side of the membrane must be always grounded.
The device can also be configured as a pre-driver to drive external FETs or BJTs to drive higher current and voltage into the primary side of the transformer, as shown in Figure 7-6, by setting the PRE_DRIVER_MODE bit. The high-side and low-side devices are used to drive the external low-side drivers. The VDRV voltage level can be configured to ensure that the OUTA and OUTB voltages do not violate the VGS or VBE specification for external the FET or BJT, respectively. In the configuration shown in Figure 7-6, it is possible to use a voltage (VBOOST) which is higher than the supply of the system for generating higher voltage across the transducer.
Refer to Section 8 for an application diagram and information on how the polarity and state of OUTA and OUTB pins are defined with respect to IO1 and IO2 pin states and other register settings.