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ZHCSMY0B April 2021 – March 2022 TXU0204-Q1

PRODUCTION DATA

8.1 Load Circuit and Voltage Waveforms

Unless otherwise noted, generators supply all input pulses that have the following characteristics:

C_L includes probe and jig capacitance.

Figure 8-1 Load Circuit

Table 8-1 Load Circuit Conditions

Parameter		V_CCO	R_L	C_L	S₁	V_TP
t_pd	Propagation (delay) time	1.1 V – 5.5 V	10 kΩ	5 pF	Open	N/A
t_en, t_dis	Enable time, disable time	1.1 V – 1.6 V	10 kΩ	5 pF	2 × V_CCO	0.1 V
		1.65 V – 2.7 V	10 kΩ	5 pF	2 × V_CCO	0.15 V
		3.0 V – 5.5 V	10 kΩ	5 pF	2 × V_CCO	0.3 V
t_en, t_dis	Enable time, disable time	1.1 V – 1.6 V	10 kΩ	5 pF	GND	0.1 V
		1.65 V – 2.7 V	10 kΩ	5 pF	GND	0.15 V
		3.0 V – 5.5 V	10 kΩ	5 pF	GND	0.3 V

V_CCI is the supply pin associated with the input port.
V_OH and V_OL are typical output voltage levels that occur with specified R_L, C_L, and S₁

Figure 8-2 Propagation Delay

V_CCI is the supply pin associated with the input port.
V_OH and V_OL are typical output voltage levels that occur with specified R_L, C_L, and S₁

Figure 8-3 Input Transition Rise and Fall Rate

Output waveform on the condition that input is driven to a valid Logic Low.
Output waveform on the condition that input is driven to a valid Logic High.
V_CCO is the supply pin associated with the output port.
V_OH and V_OL are typical output voltage levels with specified R_L, C_L, and S₁.

Figure 8-4 Enable Time And Disable Time