米6体育平台手机版

ZHCSMC3X january 1976 – june 2023 UA78L

PRODUCTION DATA

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

D|8
PK|3
LP|3

散热焊盘机械数据 (封装 | 引脚)

PK|3
- PPTD070

订购信息

6.7 Electrical Characteristics: UA78L05 (Both Legacy and New Chip)

at specified junction temperature, V_I = 10 V, C_IN = 0.33 µF, C_OUT = 0.1µF and I_O = 40 mA (unless otherwise noted)⁽¹⁾

PARAMETER	TEST CONDITIONS⁽²⁾			MIN	TYP	MAX	UNIT
Output voltage	V_I = 7 V to 20 V, and I_O = 1 mA to 40 mA (for legacy chip)	T_J = 25°C	UA78L05C	4.6	5	5.4	V
		T_J = 25°C	UA78L05AC and UA78L05AI	4.8	5	5.2
		T_J = full range	UA78L05C	4.5		5.5
		T_J = full range	UA78L05AC and UA78L05AI	4.75		5.25
	I_O = 1 mA to 70 mA, and T_J = full range (for legacy chip)	UA78L05C		4.5		5.5
	I_O = 1 mA to 70 mA, and T_J = full range (for legacy chip)	UA78L05AC and UA78L05AI		4.75		5.25
	V_I = 7 V to 20 V, and I_O = 1 mA to 40 mA (for new chip)	T_J = 25°C	UA78L05C	4.95	5	5.15
		T_J = 25°C	UA78L05AC and UA78L05AI	4.95	5	5.15
		T_J = full range	UA78L05C	4.85		5.15
		T_J = full range	UA78L05AC and UA78L05AI	4.85		5.15
	I_O = 1 mA to 70 mA, and T_J = full range (for new chip)	UA78L05C		4.80		5.14
	I_O = 1 mA to 70 mA, and T_J = full range (for new chip)	UA78L05AC and UA78L05AI		4.80		5.14
Input voltage regulation	V_I = 7 V to 20 V, and T_J = 25°C (for legacy chip)	UA78L05C			32	200	mV
	V_I = 7 V to 20 V, and T_J = 25°C (for legacy chip)	UA78L05AC and UA78L05AI			32	150
	V_I = 8 V to 20 V, and T_J = 25°C (for legacy chip)	UA78L05C			26	150
	V_I = 8 V to 20 V, and T_J = 25°C (for legacy chip)	UA78L05AC and UA78L05AI			26	100
	V_I = 7 V to 20 V, and T_J = 25°C (for new chip)	UA78L05C			32	33
	V_I = 7 V to 20 V, and T_J = 25°C (for new chip)	UA78L05AC and UA78L05AI			32	33
	V_I = 8 V to 20 V, and T_J = 25°C (for new chip)	UA78L05C			26	28
	V_I = 8 V to 20 V, and T_J = 25°C (for new chip)	UA78L05AC and UA78L05AI			26	28
Ripple rejection	V_I = 8 V to 18 V, f = 120 Hz, and T_J = 25°C (for legacy chip)	UA78L05C		40	49		dB
		UA78L05AC and UA78L05AI		41	49
	V_I = 8 V to 18 V, f = 120 Hz, and T_J = 25°C (for new chip)	UA78L05C		48	55
		UA78L05AC and UA78L05AI		48	55
Output voltage regulation	for legacy chip	I_O = 1 mA to 100 mA, and T_J = 25°C			15	60	mV
	for legacy chip	I_O = 1 mA to 40 mA, and T_J = 25°C			8	30
	for new chip	I_O = 1 mA to 100 mA, and T_J = 25°C			15	35
	for new chip	I_O = 1 mA to 40 mA, and T_J = 25°C			8	15
Output noise voltage	for legacy chip	f = 10 Hz to 100 kHz, and T_J = 25°C			42		μV
Output noise voltage	for new chip	f = 10 Hz to 100 kHz, and T_J = 25°C			125		μV
Dropout voltage	for legacy chip	T_J = 25°C			1.7		V
Dropout voltage	for new chip	T_J = 25°C			1.7		V
Bias current	for legacy chip	T_J = 25°C			3.8	6	mA
	for legacy chip	T_J = 125°C				5.5	mA
	for new chip	T_J = 25°C			3.53	3.95	mA
	for new chip	T_J = 125°C				4.0	mA
Bias current change	V_I = 8 V to 20 V, and T_J = full range (for new legacy chip)					1.5	mA
	I_O = 1 mA to 40 mA, and T_J = full range (for legacy chip)	UA78L05C				1.5	mA
	I_O = 1 mA to 40 mA, and T_J = full range (for legacy chip)	UA78L05AC and UA78L05AI				1.5	mA
	V_I = 8 V to 20 V, and T_J = full range (for new chip)					0.485	mA
	I_O = 1 mA to 40 mA, and T_J = full range (for new chip)	UA78L05C				0.01
	I_O = 1 mA to 40 mA, and T_J = full range (for new chip)	UA78L05AC and UA78L05AI				0.01

(1) Applies to UA78L05C, UA78L05AC and UA78L05AI.

(2) Pulse-testing techniques maintain T_J as close to T_A as possible. Thermal effects must be taken into account separately. For legacy chip, temperature range for the UA78L05C, UA78L05AC is T_J = 0°C to 125°C, and for the UA78L05AI is T_J = –40°C to 125°C. For new chip, temperature range for the UA78L05C, UA78L05AC and UA78L05AI is T_J = –40°C to 125°C.