ZHCSM92A January 2021 – June 2021 UCC12051-Q1
PRODUCTION DATA
The UCC12051-Q1 has an internal oscillator trimmed to drive the transformer at 8.0 MHz. An external clock may be applied at the SYNC pin to override the internal oscillator. This external clock will be divided by 2, so the target range for the external clock signal at SYNC is 16 MHz ±10%. When a valid external clock signal is detected, the internal spread spectrum modulation (SSM) algorithm is disabled. This allows an external clock signal with a unique SSM to be applied. The depth and frequency of SSM is a tradeoff verses low frequency modulated VISO voltage ripple. The SYNC_OK pin is asserted LOW if there is no external SYNC clock or one that is outside of the operating range of the device is detected. In this state, the external clock is ignored and the DC/DC converter is clocked by the internal oscillator. The pin is in high-impedance if a valid clock is applied on SYNC.