The leading edge blanking circuitry can lead to a minimum pulse width equal to the blanking interval under certain conditions. This occurs when the error amplifier output voltage (minus a diode drop and divided by 1.65) is lower than the current sense input. However, the amplifier output voltage must also be higher than a diode forward voltage drop of about 0.5 V. It is only during these conditions that a minimum output pulse width equal to the blanking duration can be obtained. Note that the PWM comparator has two inputs; one is from the current sense input. The other PWM input is the error amplifier output that has a diode and two resistors in series to ground. The diode in this network is used to ensure that zero duty cycle can be reached. Whenever the E/A output falls below a diode forward voltage drop, no current flows in the resistor divider and the PWM input goes to zero, along with pulse width.

Figure 9-15 Zero Duty Cycle Offset