ZHCSJY8E june 2019 – february 2021 UCC256402 , UCC256403 , UCC256404
PRODUCTION DATA
This part of the circuit consists of 3 elements:
The pick lower block has two inputs. The first input is FBreplica. The second input is selected between AVDD and LL/SS pin voltage. The output of the block is the lower of the two inputs.
The MUX selects between SS and AVDD. The selection is based on SSEnd (soft start end) signal, which is an output of the SS Ctrl block. SSEnd is high when SS is higher than FBreplica, and the soft start process has been initiated by the state machine, and there is no ZCS condition. Switching to AVDD after soft start has ended helps make sure that during non-soft start or non-ZCS fault condition, FBreplica signal is always sent through the pick lower block. It also releases the LL/SS pin to perform the light load threshold programming.
The SS control block handles the charge and discharge of the SS capacitor in the case of a ZCS fault. It resets the SSEnd signal when ZCS happens, so the effect of pulling down on LL/SS pin to increase the switching frequency can pass through the pick lower block.