The input stages provide the interface to the PWM output signals. The input impedance of the UCC27200 is 200kΩ nominal and input capacitance is approximately 4pF. The 200kΩ is a pulldown resistance to VSS (ground). The CMOS compatible input of the UCC27200 provides a rising threshold of 6V and falling threshold of 5.6V. The inputs of the UCC27200 are intended to be driven from 0 to VDD levels.

The input stages of the UCC27201 incorporate an open drain configuration to provide the lower input thresholds. The input impedance is 68kΩ nominal and input capacitance is approximately 4pF. The 68kΩ is a pulldown resistance to VSS (ground). The logic level compatible input provides a rising threshold of 2.3V and a falling threshold of 1.6V.