In most applications, the body diode of the external low-side power MOSFET clamps the HS node to ground. In some situations, board capacitance and inductance can cause the HS node to transiently swing several volts below ground, before the body diode of the external low-side MOSFET clamps this swing. The HS pin in the device is allowed to swing below ground as long as specifications are not violated and conditions mentioned in this section are followed.

Ensure that the HB to HS operating voltage is within the recommended operating conditions. Hence, if the HS pin transient voltage is –5 V, then VDD (and thus HB) is ideally limited to 12 V to keep the HB to HS voltage below 17 V. Generally when HS swings negative, HB follows HS instantaneously and therefore the HB to HS voltage does not significantly overshoot.

HS must always be at a lower potential than HO. Pulling HO more negative than specified conditions can activate parasitic transistors which may result in excessive current flow from the HB supply. This may result in damage to the device. The same relationship is true with LO and VSS. If necessary, a Schottky diode can be placed externally between HO and HS or LO and VSS to protect the device from this type of transient. The diode must be placed as close to the device pins as possible in order to be effective.

Low ESR bypass capacitors from HB to HS and from VDD to VSS are essential for proper operation of the gate driver device. The capacitor should be located at the leads of the device to minimize series inductance. The peak currents from LO and HO can be quite large. Any series inductance with the bypass capacitor causes voltage ringing at the leads of the device which must be avoided for reliable operation.

Based on application board design and other operating parameters, along with HS pin, other pins such as HI and LI input pins might also transiently swing below ground. To accommodate such operating conditions, the input pins of the device are capable of handling absolute maximum of –10 V. Based on the layout and other design constraints, sometimes the outputs, HO and LO, might also see transient voltages for short durations. Therefore, the device can also handle –2-V transients with less than 100-ns duration on the HO and LO output pins.