UCC27511 和 UCC27512 单通道高速低侧栅极驱动器器件可有效驱动金属氧化物半导体场效应晶体管 (MOSFET) 和绝缘栅双极型晶体管 (IGBT) 电源开关。UCC27511 和 UCC27512 采用的设计方案可最大程度减少击穿电流,从而为电容负载提供较高的峰值拉/灌电流脉冲,同时提供轨到轨驱动能力以及超短的传播延迟(典型值为 13ns)。
器件型号 | 封装 | 封装尺寸(标称值) |
---|---|---|
UCC27511 | SOT-23 (6) | 2.90mm x 1.60mm |
UCC27512 | WSON (6) | 3.00mm x 3.00mm |
Changes from E Revision (December 2013) to F Revision
Changes from D Revision (May 2013) to E Revision
Changes from C Revision (June 2012) to D Revision
Changes from B Revision (March, 2012) to C Revision
UCC27511 特有 双输入设计,同一器件可灵活实现反相(IN- 引脚)和非反相(IN+ 引脚)配置。IN+ 引脚和 IN- 引脚均可用于控制驱动器输出的状态。未使用的输入引脚可用于启用和禁用功能。出于安全考虑,输入引脚上的内部上拉和下拉电阻器在输入引脚处于悬空状态时,确保输出被保持在低电平。因此,未使用的输入引脚不能保持在悬空状态,而需要被适当的偏置以确保驱动器输出被启用用于正常运行。
UCC27511 器件的输入引脚阈值基于与 TTL 和 COMS 兼容的低电压逻辑电路,此逻辑电路是固定的且与 VDD 电源电压无关。高低阈值间的宽滞后提供了出色的抗扰度。
UCC27511 和 UCC27512 提供 4A 拉电流,8A 灌电流(非对称驱动)峰值驱动电流能力。非对称驱动中的强劲灌电流能力提升了抗寄生、米勒接通效应的能力。UCC27511 器件还 具有 一个独特的分离输出配置,其中的栅极驱动电流通过 OUTH 引脚拉出,通过 OUTL 引脚灌入。这种独特的引脚排列使得用户能够分别在 OUTH 和 OUTL 引脚上使用独立的接通和关断电阻,并且能轻松控制开关转换率。
UCC27511 和 UCC27512 具有 4.5V 至 18V 的宽 VDD 范围,以及 –40°C 至 140°C 的宽温度范围。VDD 引脚上的内部欠压锁定 (UVLO) 电路可在超出 VDD 运行范围时使输出保持低电平。此器件能够在低电压(例如低于 5V)下运行,并且拥有同类米6体育平台手机版_好二三四中较好的开关特性,因此非常适用于驱动诸如 GaN 功率半导体器件等新上市的宽带隙电源开关器件。
The UCC2751x family of gate-driver products (Table 1) represent Texas Instruments’ latest generation of single-channel low-side high-speed gate-driver devices featuring high-source/sink current capability, industry best-in-class switching characteristics and a host of other features (Table 2) all of which combine to ensure efficient, robust and reliable operation in high-frequency switching power circuits.
PART NUMBER | PACKAGE | PEAK CURRENT (SOURCE/SINK) | INPUT THRESHOLD LOGIC |
---|---|---|---|
UCC27511DBV | SOT-23, 6 pin | 4-A/8-A (Asymmetrical Drive) |
CMOS/TTL-Compatible (low voltage, independent of VDD bias voltage) |
UCC27512DRS | 3-mm x 3-mm WSON, 6 pin | ||
UCC27516DRS (1) | 3-mm x 3-mm WSON, 6 pin | 4-A/4-A (Symmetrical Drive) |
|
UCC27517DBV (1) | SOT-23, 5 pin | ||
UCC27518DBV (1) | SOT-23, 5 pin | CMOS (follows VDD bias voltage) |
|
UCC27519DBV (1) | SOT-23, 5 pin |
FEATURE | BENEFIT |
---|---|
High Source and Sink Current Capability 4 A and 8 A (Asymmetrical) – UCC2751/6/7/8/9 4 A and 4 A (Symmetrical) – UCC27511 and UCC27512 |
High current capability offers flexibility in employing UCC2751x family of devices to drive a variety of power switching devices at varying speeds |
Best-in-class 13-ns (typ) Propagation delay | Extremely low pulse-transmission distortion |
Expanded VDD Operating range of 4.5 V to 18 V | Flexibility in system design Low VDD operation ensures compatibility with emerging wide band-gap power devices such as GaN |
Expanded Operating Temperature range of –40°C to 140°C (See Electrical Characteristics table) |
|
VDD UVLO Protection | Outputs are held low in UVLO condition, which ensures predictable glitch-free operation at power up and power down |
Outputs held low when input pins (INx) in floating condition | Safety feature, especially useful in passing abnormal condition tests during safety certification |
Ability of input pins (and enable pin in UCC27518/9) to handle voltage levels not restricted by VDD pin bias voltage | System simplification, especially related to auxiliary bias supply architecture |
Split output structure in UCC27511 (OUTH, OUTL) | Allows independent optimization of turnon and turnoff speeds |
Strong sink current (8 A) and low pulldown impedance (0.375 Ω) in UCC27511 and UCC27512 | High immunity to C x dV/dt Miller turnon events |
CMOS/TTL compatible input-threshold logic with wide hysteresis in UCC27511, UCC27512, UCC27516 and UCC27517 | Enhanced noise immunity, while retaining compatibility with microcontroller logic-level input signals (3.3 V, 5 V) optimized for digital power |
CMOS input threshold logic in UCC27518/9 (VIN_H – 70% VDD, VIN_L – 30% VDD) | Well suited for slow input-voltage signals, with flexibility to program delay circuits (RCD) |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | VDD | I | Bias supply input. |
2 | OUTH | O | Sourcing current output of driver. Connect resistor between OUTH and Gate of power-switching device to adjust turnon speed. |
3 | OUTL | O | Sinking current output of driver. Connect resistor between OUTL and Gate of power-switching device to adjust turnoff speed. |
4 | GND | - | Ground: All signals referenced to this pin. |
5 | IN- | I | Inverting input: When the driver is used in noninverting configuration, connect IN- to GND in order to enable output, OUT held LOW if IN- is unbiased or floating |
6 | IN+ | I | Noninverting input: When the driver is used in inverting configuration, connect IN+ to VDD in order to enable output, OUT held LOW if IN+ is unbiased or floating |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | IN+ | I | Noninverting input: When the driver is used in inverting configuration, connect IN+ to VDD in order to enable output, OUT held LOW if IN+ is unbiased or floating. |
2, 5 | GND | - | Ground: All signals referenced to this pin. TI recommends to connect pin 2 and pin 5 on PCB as close to the device as possible. |
3 | VDD | I | Bias supply input. |
4 | OUT | O | Sourcing/sinking current output of driver. |
6 | IN- | I | Inverting input: When the driver is used in noninverting configuration, connect IN- to GND in order to enable output, OUT held LOW if IN- is unbiased or floating. |