The UCC27511A-Q1 device features very low quiescent I_DD currents. The typical operating-supply current in undervoltage-lockout (UVLO) state and fully-on state (under static and switching conditions) are summarized in Figure 5-5, Figure 5-6 and Figure 5-7. The I_DD current when the device is fully on and outputs are in a static state (DC high or DC low, refer Figure 5-7) represents lowest quiescent I_DD current when all the internal logic circuits of the device are fully operational. The total supply current is the sum of the quiescent I_DD current, the average I_O current because of switching, and finally any current related to pullup resistors on the unused input pin. For example, when the inverting input pin is pulled low additional current is drawn from the V_DD supply through the pullup resistors (see Section 6.2). Knowing the operating frequency (ƒ_S) and the MOSFET gate (Q_G) charge at the drive voltage being used, the average I_O current can be calculated as product of Q_G and ƒ_S.

A complete characterization of the I_DD current as a function of switching frequency at different V_DD bias voltages under 1.8-nF switching load is provided in Figure 5-15. The strikingly linear variation and close correlation with the theoretical value of the average I_O indicates negligible shoot-through inside the gate-driver device attesting to the high-speed characteristics.