The UCC2752x products feature very low quiescent I_DD currents. The typical operating-supply current in UVLO state and fully on state (under static and switching conditions) are summarized in Figure 6-5, Figure 6-6 and Figure 6-7. The I_DD current when the device is fully on and outputs are in a static state (DC high or DC low, refer Figure 6-6) represents lowest quiescent I_DD current when all the internal logic circuits of the device are fully operational. The total supply current is the sum of the quiescent I_DD current, the average I_OUT current due to switching and finally any current related to pullup resistors on the enable pins and inverting input pins. For example when the inverting Input pins are pulled low additional current is drawn from V_DD supply through the pullup resistors (refer to Figure 7-1 though Figure 7-3). Knowing the operating frequency (f_SW) and the MOSFET gate (Q_G) charge at the drive voltage being used, the average I_OUT current can be calculated as product of Q_G and f_SW.

A complete characterization of the I_DD current as a function of switching frequency at different V_DD bias voltages under 1.8-nF switching load in both channels is provided in Figure 6-17. The strikingly linear variation and close correlation with theoretical value of average I_OUT indicates negligible shoot-through inside the gate-driver device attesting to its high-speed characteristics.