| THERMAL METRIC(1) |
UCC27532 DBV (6 PINS) |
UNITS |
| θJA |
Junction-to-ambient thermal resistance(2) |
178.3 |
°C/W |
| θJCtop |
Junction-to-case (top) thermal resistance(3) |
109.7 |
| θJB |
Junction-to-board thermal resistance(4) |
28.3 |
| ψJT |
Junction-to-top characterization parameter(5) |
14.7 |
| ψJB |
Junction-to-board characterization parameter(6) |
27.8 |
| θJCbot |
Junction-to-case (bottom) thermal resistance(7) |
n/a |
(1) For more information about traditional and new thermal
metrics, see the
Semiconductor and IC Package Thermal Metrics application
report (
SPRA953).
(2) The junction-to-ambient thermal resistance under natural
convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is
obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI
SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by
simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter,
ψJT, estimates the junction temperature of a device in a real
system and is extracted from the simulation data for obtaining RθJA,
using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter,
ψJB, estimates the junction temperature of a device in a real
system and is extracted from the simulation data for obtaining RθJA,
using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is
obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI
SEMI standard G30-88.