ZHCSH10B October 2017 – August 2018 UCC27710
PRODUCTION DATA.
A typical half-bridge configuration with UCC27710 is shown in Figure 40. There are parasitic inductances in the power circuit from die bonding and pinning in QT/QB and PCB tracks of power circuit, the parasitic inductances are labeled LK1,2,3,4.
During switching of HS caused by turning off HO, the current path of power circuit is changed to current path 2 from current path 1. This is known as current commutation. The current across LK3, LK4 and body diode of QB pulls HS lower than COM. The negative voltage of HS with respect to COM causes a logic error of HO if the driver cannot handle negative voltage of HS. However, the UCC27710 offers robust operation under these conditions of negative voltage on HS.
The level shifter circuit is with respect to COM (refer to Functional Block Diagram), the voltage from HB to COM is the supply voltage of level shifter. Under the condition of HS is negative voltage with respect to COM, the voltage of HB-COM is decreased, as shown in Figure 41. There is a minimum operational supply voltage of level shifter, if the supply voltage of level shifter is too low, the level shifter cannot pass through HI signal to HO. The minimum supply voltage of level shifter of UCC27710 is 4 V, so the recommended HS specification is dependent on HB-HS. The specification of recommended HS is –11 V at HB – HS = 15 V.
In general, HS can operate until -11 V when HB – HS = 15 V as the ESD structure in Figure 35 allows a maximum voltage difference of 20 V between both pins. If HB-HS voltage is different, the minimum HS voltage changes accordingly.
NOTE
Logic operational for HS of –11 V to 600 V at HB – HS = 15 V
The capability of a typical UCC27710 device to operate under a negative voltage condition in HS pin is reported in Figure 43. The test method is shown in Figure 42.