SGLS121D December 2002 – June 2020 UCC2800-Q1 , UCC2801-Q1 , UCC2802-Q1 , UCC2803-Q1 , UCC2804-Q1 , UCC2805-Q1
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (continued)
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Detailed Pin Description
- 9.3.2 Undervoltage Lockout (UVLO)
- 9.3.3 Self-Biasing, Active Low Output
- 9.3.4 Reference Voltage
- 9.3.5 Oscillator
- 9.3.6 Synchronization
- 9.3.7 PWM Generator
- 9.3.8 Minimum Off-Time Setting (Dead-Time Control)
- 9.3.9 Leading Edge Blanking
- 9.3.10 Minimum Pulse Width
- 9.3.11 Current Limiting
- 9.3.12 Overcurrent Protection and Full Cycle Restart
- 9.3.13 Soft Start
- 9.3.14 Slope Compensation
- 9.4 Device Functional Modes
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
9.3.14 Slope Compensation
Slope compensation can be added in all current mode control applications to cancel the peak to average current error. Slope compensation is necessary with applications with duty cycles exceeding 50%, but also improves performance in those below 50%. Primary current is sensed using resistor Rcs in series with the converter switch. The timing resistor can be broken up into two series resistors to bias up the NPN follower. This is required to provide ample compliance for slope compensation at the beginning of a switching cycle, especially with continuous current converters. A NPN voltage follower drives the slope compensating programming resistor (Rsc) to provide a slope compensating current into CF.
Figure 32. Adding Slope Compensation