8.4 Device Functional Modes
The controller is primarily intended for set up as a dual phase interleaved PFC which utilizes inductor demagnetization information based on inductor sense winding voltages which are routed to ZCDA and ZCDB to trigger the start of a switching cycle.
The functionality may be extended in a couple of ways:
Phase-B Enable and Disable:When the voltage on COMP is below the voltage on the PHB pin, Phase B and the Phase Fail Detector will be disabled. The on-time for Phase-A will be doubled to compensate the Phase-B missing power. When the voltage on COMP is greater than the PHB pin voltage, two phase mode is enabled. Connect PHB to a resistor divider sourced by VREF to set a threshold for COMP pin and obtain an automatic light load efficiency management feature. Because when PHB voltage is higher then COMP voltage, the on-time is doubled, in order to avoid risk of inductor saturation an internal clamp ensures the on-time never can exceed dual phase mode maximum on-time.
PFC Stage Enable and Disable Control:Controller operation is enabled when VSENSE voltage exceeds the 1.25-V enable threshold. The primary disable method should be by pulling VSENSE low by an open drain or open collector logic output. This will disable the outputs and significantly reduce VCC current. Releasing VSENSE will initiate a soft-start. Avoid any PCB traces which would couple any noise into this node.