SLUSA29D April   2010  – August 2015 UCC28250

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VDD (5/12)
      2. 7.3.2  VREF (Reference Generator) (20/7)
      3. 7.3.3  EN (Enable Pin) (18/5)
      4. 7.3.4  RT (Oscillator Frequency Set and Synchronization) (15/2)
      5. 7.3.5  SP (Synchronous Rectifier Turnoff to Primary Output Turnon Dead Time Programming) (13/19)
      6. 7.3.6  PS (Primary Output Turnoff to Synchronous Rectifier Turnon Dead Time Programming) (11/18)
      7. 7.3.7  RAMP/CS (PWM Ramp Input or Current Sense Input) (16/3)
        1. 7.3.7.1 RAMP: Voltage Mode Control With Feed-Forward Operation
        2. 7.3.7.2 CS: Current Mode Control
      8. 7.3.8  REF/EA+ (1/8)
      9. 7.3.9  FB/EA- (2/9)
      10. 7.3.10 COMP (3/10)
      11. 7.3.11 VSENSE (14/1)
      12. 7.3.12 SS (Soft Start Programming Pin) (13/20)
      13. 7.3.13 ILIM (Current Limit for Cycle-By-Cycle Overcurrent Protection) (17/4)
      14. 7.3.14 HICC (10/17)
      15. 7.3.15 OVP/OTP (19/6)
      16. 7.3.16 OUTA (9/16) and OUTB (8/15)
      17. 7.3.17 SRA (7/14) and SRB (6/13)
      18. 7.3.18 GND (4/11)
    4. 7.4 Device Functional Modes
  8. 8 Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Error Amplifier and PWM Generation
      2. 8.1.2 Prebiased Start-Up
        1. 8.1.2.1 Secondary-Side Control
        2. 8.1.2.2 Primary-Side Control
        3. 8.1.2.3 Voltage Mode Control and Input Voltage Feed-Forward
          1. 8.1.2.3.1 Condition 1
          2. 8.1.2.3.2 Condition 2
          3. 8.1.2.3.3 Condition 3
        4. 8.1.2.4 Peak Current Mode Control
        5. 8.1.2.5 Cycle-by-Cycle Current Limit and Hiccup Mode Protection
    2. 8.2 Typical Applications
      1. 8.2.1 Design Example
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Step 1, Power Stage Design
          2. 8.2.1.2.2 Step 2, Feedback Loop Design
          3. 8.2.1.2.3 Step 3, Programming the Device
            1. 8.2.1.2.3.1 Step 3-1
            2. 8.2.1.2.3.2 Step 3-2, Determine RAMP Resistance and Capacitance
          4. 8.2.1.2.4 Step 3-3, Determine Soft-Start Capacitance
          5. 8.2.1.2.5 Step 3-4, Determine Dead-Time Resistance
          6. 8.2.1.2.6 Step 3-5, Determine OCP Hiccup Off-Time Capacitance
          7. 8.2.1.2.7 Step 3-6, Determine Primary-Side OVP Resistance
          8. 8.2.1.2.8 Step 3-7, Select Capacitance for VDD and VREF
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Secondary-Side Half-Bridge Controller with Synchronous Rectification
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Protection
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

RGB Package
20-Pin VQFN
Top View
UCC28250 pinout_lusa29.gif
PW Package
20-Pin TSSOP
Top View
UCC28250 pinout2_lusa29.gif

Pin Functions

PIN I/O DESCRIPTION
NAME QFN PW
COMP 3 10 I/O Error amplifier output
EN 18 5 I Device enable and disable
FB/EA- 2 9 I Error amplifier inverting input
GND 4 11 I Ground
HICC 10 17 I Cycle-by-cycle current limit time delay and Hiccup time setting
ILIM 17 4 I Current sense for cycle-by-cycle overcurrent protection
OUTA 9 16 O 0.2-A sink/source primary switching output
OUTB 8 15 O 0.2-A sink/source primary switching output
OVP/OTP 19 6 I Overvoltage and overtemperature protection pin
PS 11 18 I Primary off to synchronous rectifier on dead-time set
RAMP/CS 16 3 I PWM ramp input (for voltage mode control) or current sense input (for current mode control)
REF/EA+ 1 8 I Error amplifier noninverting input
RT 15 2 I Oscillator frequency set or synchronous clock input
SP 12 19 I Synchronous rectifier off to primary on dead-time set
SRA 7 14 O 0.2-A sink/source synchronous rectifier output
SRB 6 13 O 0.2-A sink/source synchronous rectifier output
SS 13 20 I/O Soft-start programming
VDD 5 12 I Bias supply input
VREF 20 7 O 3.3-V reference output
VSENSE 14 1 I Output voltage sensing for prebias control
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP | 米乐app下载官网（中国）|ios|Android/通用版APP最新版 | 米乐|米乐·M6（中国大陆）官方网站 | 千亿体育登陆地址 | 华体会体育（中国）HTH·官方网站 | 千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载 | 18新利网v1.2.5|中国官方网站 | bob电竞真人（中国官网）安卓/ios苹果/电脑版【1.97.95版下载】 | 千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装 |