8.3.5 Fixed-Point Magnetic Sense Sampling Error Sources

To support operation in CCM, and allow operation at fixed frequency over a large percentage of the load range, the UCC2863x uses fixed-point sampling rather than knee-point detection. When conventionally used, fixed-point sampling typically suffers from poorer regulation performance. This poor performance results from the voltage drops across the secondary-side parasitic resistance R_SEC, and the secondary-side leakage inductance from secondary-side to bias L_{LK(sec_bias)}, as a consequence of the fact that current remains flowing on the secondary-side when the device measures the output voltage. As shown in Figure 27, the secondary-side pin voltage that gets reflected to the bias winding is detailed in Equation 9.

Equation 9.

Equation 9 can be expanded and rearranged into Equation 10.

Equation 10.

Figure 27. Secondary-Side Pin Voltage Contributors with Secondary-Side Current Flow

Many elements contribute errors to the sensed secondary-side pin voltage, when measured across the bias winding:

• V_L(leak): Negative voltage drop across the sec-bias leakage inductance L_{LK(sec_bias)}; assuming constant regulated output voltage, this voltage drop is fixed constant offset, because V_OUT/L_SEC is constant as long as the output is in regulation.
• V_RECT: Positive voltage drop across the output rectifier (assuming use of a conventional diode). This voltage drop varies with load current and temperature. However, a constant nominal voltage drop can usually be used, because the increasing forward voltage drop with increasing load current is largely cancelled by the decrease in forward drop as a result of the temperature rise that results.
• V_R(sec): This is the drop across the secondary-side winding resistance. This value depends on loading, and varies in proportion to the primary peak current demand that is set by the modulator.
• V_RC(esr): This is the drop across the output capacitor equivalent series resistance (esr). This value depends on the difference between the secondary-side winding current and the DC load current being drawn.

Typically, the peak secondary-side winding current I_SEC is many times larger than the load current, and the secondary-side winding resistance is typically larger than the output capacitor esr. Thus, the last term in Equation 10 involving I_LOAD can typically be neglected.

The leakage inductance and secondary-side rectifier terms represent quasi-constant offset terms, so do not affect regulation to a significant extent. Thus, the quasi-constant offset terms can be accounted for in the calculation of the required scaling resistors to produce the desired setpoint voltage.

The remaining term that dominates the regulation error in Equation 10 is the drop across the secondary-side winding resistance and capacitor esr at the sample instant, {I_SEC x(R_SEC + R_C(esr))}. The controller internally adjusts the control loop reference in proportion to the primary peak current demand in order to null the I_SEC related error term in the sampled bias winding voltage. Since the peak secondary-side current I_SEC(pk) is the primary peak current I_PRI(pk) scaled by the transformer turns ratio, the internal control loop reference effectively varies in approximate proportion to I_SEC, resulting in dramatically improved regulation performance.

This improved regulation performance allows the use of primary-side regulation in a wider range of applications, and at unprecedented power levels, operating in both CCM and DCM.