SLUSBE8B May   2013  – September 2015 UCC28720

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Primary-Side Voltage Regulation
      2. 7.4.2 Primary-Side Current Regulation
      3. 7.4.3 Valley Switching
      4. 7.4.4 Start-Up Operation
      5. 7.4.5 Fault Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stand-by Power Estimate
        2. 8.2.2.2 Input Bulk Capacitance and Minimum Bulk Voltage
        3. 8.2.2.3 Transformer Turns Ratio, Inductance, Primary-Peak Current
        4. 8.2.2.4 Transformer Parameter Verification
        5. 8.2.2.5 Output Capacitance
        6. 8.2.2.6 VDD Capacitance, CDD
        7. 8.2.2.7 VS Resistor Divider, Line Compensation, and Cable Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
        1. 11.1.1.1 Definition of Terms
          1. 11.1.1.1.1  Capacitance Terms in Farads
          2. 11.1.1.1.2  Duty Cycle Terms
          3. 11.1.1.1.3  Frequency Terms in Hertz
          4. 11.1.1.1.4  Current Terms in Amperes
          5. 11.1.1.1.5  Current and Voltage Scaling Terms
          6. 11.1.1.1.6  Transformer Terms
          7. 11.1.1.1.7  Power Terms in Watts
          8. 11.1.1.1.8  Resistance Terms in Ω
          9. 11.1.1.1.9  Timing Terms in Seconds
          10. 11.1.1.1.10 Voltage Terms in Volts
          11. 11.1.1.1.11 AC Voltage Terms in VRMS
          12. 11.1.1.1.12 Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

D PACKAGE
7-PIN SOIC
Top View
UCC28720 pin_lusbe8.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
VDD 1 I VDD is the bias supply input pin to the controller. A carefully-placed bypass capacitor to GND is required on this pin.
VS 2 I Voltage sense is an input used to provide voltage and timing feedback to the controller. This pin is connected to a voltage divider between an auxiliary winding and GND. The value of the upper resistor of this divider is used to program the AC-mains run and stop thresholds and line compensation at the CS pin.
CBC 3 I Cable compensation is a programming pin for compensation of cable voltage drop. Cable compensation is programmed with a resistor to GND.
GND 4 — The ground pin is both the reference pin for the controller and the low-side return for the drive output. Special care must be taken to return all AC decoupling capacitors as close as possible to this pin and avoid any common trace length with analog signal return paths.
CS 5 I Current sense input connects to a ground-referenced current-sense resistor in series with the power switch. The resulting voltage is used to monitor and control the peak primary current. A series resistor can be added to this pin to compensate the peak switch current levels as the AC-mains input varies.
DRV 6 O Drive is an output used to drive the base of an external high voltage NPN transistor.
HV 7 I The high-voltage pin connects directly to the rectified bulk voltage and provides charge to the VDD capacitor for start-up of the power supply.
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