ZHCSDC4 February   2015 UCC28730

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1. 5.1 Detailed Pin Description
      1. 5.1.1 VDD (Device Bias Voltage Supply)
      2. 5.1.2 GND (Ground)
      3. 5.1.3 HV (High Voltage Startup)
      4. 5.1.4 DRV (Gate Drive)
      5. 5.1.5 CBC (Cable Compensation)
      6. 5.1.6 VS (Voltage Sense)
      7. 5.1.7 CS (Current Sense)
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Primary-Side Regulation (PSR)
      2. 7.3.2 Primary-Side Constant Voltage Regulation
      3. 7.3.3 Primary-Side Constant Current Regulation
      4. 7.3.4 Wake-Up Detection and Function
      5. 7.3.5 Valley-Switching and Valley-Skipping
      6. 7.3.6 Startup Operation
      7. 7.3.7 Fault Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Stand-By Power Estimate
        2. 8.2.2.2 Input Bulk Capacitance and Minimum Bulk Voltage
        3. 8.2.2.3 Transformer Turns Ratio, Inductance, Primary-Peak Current
        4. 8.2.2.4 Transformer Parameter Verification
        5. 8.2.2.5 Output Capacitance
        6. 8.2.2.6 VDD Capacitance, CVDD
        7. 8.2.2.7 VS Resistor Divider, Line Compensation, and Cable Compensation
        8. 8.2.2.8 VS Wake-Up Detection
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 器件命名规则
        1. 11.1.1.1  电容术语（以法拉为单位）
        2. 11.1.1.2  占空比相关术语
        3. 11.1.1.3  频率术语（以赫兹为单位）
        4. 11.1.1.4  电流术语（以安培为单位）
        5. 11.1.1.5  电流和电压调节术语
        6. 11.1.1.6  变压器术语
        7. 11.1.1.7  功率术语（以瓦特为单位）
        8. 11.1.1.8  电阻术语（以 Ω 为单位）
        9. 11.1.1.9  时序术语（以秒为单位）
        10. 11.1.1.10 直流电压术语（以伏特为单位）
        11. 11.1.1.11 交流电压术语（以伏特为单位）
        12. 11.1.1.12 效率术语
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Voltage HV 700 V
VDD 38
VS –0.75 7
CS, CBC –0.5 5
DRV –0.5 Self-limiting
Current DRV, continuous sink 50 mA
DRV, source Self-limiting
VS, peak, 1% duty-cycle –1.2
TLEAD Lead temperature 0.6 mm from case for 10 seconds –65 150 °C
Tstg Storage temperature 260
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VVDD Bias-supply operating voltage 9 35 V
CVDD VDD by-pass capacitor 0.047 µF
RCBC Cable-compensation resistance 10 kΩ
IVS VS pin current, out of pin 1 mA
TJ Operating junction temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) {PACKAGE} UNIT
{PIN COUNT} PINS
RθJA Junction-to-ambient thermal resistance 141.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 73.8
RθJB Junction-to-board thermal resistance 89.0
ψJT Junction-to-top characterization parameter 23.5
ψJB Junction-to-board characterization parameter 88.2
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over operating free-air temperature range, VVDD = 25 V, HV = open, RCBC = open, TA = -40°C to 125°C, TJ = TA (unless otherwise noted)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
High-Voltage Start-Up
IHV Start-up current out of VDD VHV = 100 V, VVDD = 0 V, start state 100 250 500 µA
IHVLKG25 Leakage current into HV VHV = 400 V, run state, TJ = 25°C 0.01 0.5 µA
Bias Supply Input Current
IRUN Supply current, run Run state, IDRV = 0 A 2.1 2.65 mA
IWAIT Supply current, wait Wait state, IDRV = 0 A, VVDD = 20 V 52 75 µA
ISTART Supply current, start Start state, IDRV = 0 A, VVDD = 18 V, IHV = 0 A 18 30 µA
IFAULT Supply current, fault Fault state, IDRV = 0 A 54 75 µA
Under-Voltage Lockout
VVDD(on) VDD turn-on threshold VVDD low to high 17.5 21 23 V
VVDD(off) VDD turn-off threshold VVDD high to low 7.3 7.7 8.1 V
VS Input and Wake-Up Monitor
VVSR Regulating level(1) Measured at no-load condition,  TJ = 25°C 4.00 4.04 4.08 V(1)
VVSNC Negative clamp level below GND IVSLS = –300 µA 190 250 325 mV
IVSB Input bias current VVS = 4 V -0.25 0 0.25 µA
VWU(high) Wake-up threshold at VS, high(2) VS pin rising 2 V(2)
VWU(low) Wake-up threshold at VS, low VS pin rising 15 57 105 mV
CS Input
VCST(max) CS maximum threshold voltage(3) VVS = 3.7 V 710 740 770 mV(3)
VCST(min) CS minimum threshold voltage VVS = 4.35 V 230 249 270 mV
KAM AM control ratio, VCST(max) / VCST(min) 2.75 2.99 3.20 V/V
VCCR Constant-current regulation factor 310 319 329 mV
KLC Line compensation current ratio, IVSLS / current out of CS pin IVSLS = –300 µA 24 25.3 28 A/A
Driver
IDRS DRV source current VDRV = 8 V, VVDD = 9 V 20 29 35 mA
RDRVLS DRV low-side drive resistance IDRV = 10 mA 6 12 Ω
VDRCL DRV clamp voltage VVDD = 35 V 13 14.5 16 V
RDRVSS DRV pull-down in start state 150 190 230 kΩ
Protection
VOVP Over-voltage threshold(1) At VS input, TJ = 25°C 4.52 4.62 4.71 V(1)
VOCP Over-current threshold At CS input 1.4 1.5 1.6 V
IVSL(run) VS line-sense run current Current out of VS pin increasing 190 225 275 µA
IVSL(stop) VS line-sense stop current Current out of VS pin decreasing 70 80 100 µA
KVSL VS line-sense ratio, IVSL(run) / IVSL(stop) 2.45 2.8 3.05 A/A
TJ(stop) Thermal shut-down temperature Internal junction temperature 165 °C
Cable Compensation
VCBC(max) Cable compensation output maximum voltage Voltage at CBC at full load 2.9 3.13 3.5 V
VCVS(min) Minimum compensation at VS VCBC = open, change in VS regulating level from no load to full load –50 –15 20 mV
VCVS(max) Maximum compensation at VS VCBC = 0 V, change in VS regulating level from no load to full load 275 325 375 mV
(1) The regulating level and OV threshold at VS decrease with increasing temperature by 1 mV/°C. This compensation over temperature is included to reduce the variances in power supply output regulation and over-voltage detection with respect to the external output rectifier.
(2) Designed for accuracy within ±10% of typical value.
(3) These threshold voltages represent average levels. This device automatically varies the current sense thresholds to improve EMI performance.

6.6 Timing Requirements

MIN NOM MAX UNIT
tWUDLY Wake-up qualification delay, VVS = 0 V 7.0 8.5 11.0 µs
tCSLEB Leading-edge blanking time , DRV output duration, VCS = 1 V 170 225 280 ns
tZTO Zero-crossing timeout delay, no zero-crossing detected 1.6 2.2 2.9 µs

6.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
fSW(max) Maximum switching frequency(1) VVS = 3.7 V 76.0 83.3 90.0 kHz
fSW(min) Minimum switching frequency VVS = 4.35 V 25 32 37 Hz
(1) These frequency limits represent average levels. This device automatically varies the switching frequency to improve EMI performance.

6.8 Typical Characteristics

VVDD = 25 V, TJ = 25°C, unless otherwise noted.
UCC28730 D001_SLUSBL5.gif
IHV = 0 A IDRV = 0 A
Figure 1. Bias Supply Current vs. Bias Supply Voltage
UCC28730 D003_SLUSBL5.gif
VVDD = 0 V
Figure 3. HV Start-up Current vs. Temperature
UCC28730 D005_SLUSBL5.gif
Figure 5. VS Line-Sense Current vs. Temperature
UCC28730 D007_SLUSBL5.gif
Figure 7. Constant-Current Regulation Factor vs. Temperature
UCC28730 D009_SLUSBL5.gif
VVS = 4.35 V
Figure 9. Minimum Switching Frequency vs. Temperature
UCC28730 D011_SLUSBL5.gif
Figure 11. Wake-Up Lower Threshold Voltage vs. Temperature
UCC28730 D002_SLUSBL5.gif
IHV = 0 A IDRV = 0 A
Figure 2. Bias Supply Current vs. Temperature
UCC28730 D004_SLUSBL5.gif
VVDD = 25 V
Figure 4. HV Leakage Current vs. Temperature
UCC28730 D006_SLUSBL5.gif
Figure 6. VS Voltages vs. Temperature
UCC28730 D008_SLUSBL5.gif
Figure 8. CS Minimum Threshold Voltage vs. Temperature
UCC28730 D010_SLUSBL5.gif
VVDD = 9 V VDRV = 8 V
Figure 10. DRV Source Current vs. Temperature
UCC28730 D012_SLUSBL5.gif
VVS = 0 V
Figure 12. Wake-Up Qualification Delay Time vs. Temperature
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