ZHCSHY7A April 2018 – May 2018 UCC28742
PRODUCTION DATA.
- 1 特性
- 2 应用
- 3 说明
- 4 修订历史记录
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
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8 Applications and Implementation
- 8.1 Application Information
- 8.2
Typical Application
- 8.2.1 Design Requirements
- 8.2.2
Detailed Design Procedure
- 8.2.2.1 Custom Design With WEBENCH® Tools
- 8.2.2.2 VDD Capacitance, CDD
- 8.2.2.3 VDD Start-Up Resistance, RSTR
- 8.2.2.4 Input Bulk Capacitance and Minimum Bulk Voltage
- 8.2.2.5 Transformer Turns Ratio, Inductance, Primary-Peak Current
- 8.2.2.6 Transformer Parameter Verification
- 8.2.2.7 VS Resistor Divider and Line Compensation
- 8.2.2.8 Standby Power Estimate
- 8.2.2.9 Output Capacitance
- 8.2.2.10 Feedback Loop Design Consideration
- 8.2.3 Application Curves
- 8.3 Do's and Don'ts
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文档支持
- 12机械、封装和可订购信息
8.2.2.2 VDD Capacitance, CDD
The capacitance on VDD needs to supply the device operating current until the output of the converter reaches the target minimum operating voltage. At this time the auxiliary winding can sustain the voltage to the UCC28742. The total output current available to the load and to charge the output capacitors is the constant-current regulation target. The equation below assumes the output current of the flyback is available to charge the output capacitance until the minimum output voltage is achieved to maintain VDD above its VVDD(on). The gate-drive current depends on particular MOSFET to be used. If with an estimated average 1.0 mA of gate-drive current, CDD is determined by Equation 6, and at IOCC, VOCC = VOCV.
