As N_SW drops to two in ABM and the condition of f_BUR less than f_BUR(LR) is qualified under two consecutive burst periods, the controller enters into LPM mode and disables PWMH. The purpose of LPM is to provide a soft peak current transition between V_CST(BUR) and V_CST(MIN). LPM fixes N_SW at two and sets f_BUR equal to f_LPM of 25 kHz. In LPM mode, V_CST is controlled to regulate the output voltage. At the start of each burst packet, after RUN pulls high, t_D(RUN-PWML) is used to wake up both the isolated gate driver and the controller. With PWMH disabled, the two PWML pulses turn on Q_L close to valley-switching by sensing ZCD. When ZCD is detected again at the end of the second pulse, the RUN pin goes low and the controller enters its low-power wait state. For LPM mode with the SET pin connected to REF, the minimum on-time of PWML can be further reduced to t_ON(MIN), to allow the peak magnetizing current to be reduced below the level limited by t_CSLEB of the peak current loop. In this condition, operation of the LPM control loop is changed from a current-mode control to a voltage-mode control, so the on-time adjustment of PWML is not limited to t_CSLEB. With this feature, before f_BUR starts to fall below f_LPM and enters the audible frequency range of SBP mode, the peak current is low enough to limit the magnitude of audible excitation.

Figure 7-32 PWM Pattern in LPM