ZHCSNG6 November 2021 UCC28781-Q1
PRODUCTION DATA
The voltage at the BUR pin (VBUR) sets a target peak current-sense threshold at the CS pin (VCST(BUR)) which programs the onset of adaptive burst mode (ABM). VBUR also determines the clamped peak current level of switching cycles in each burst packet. When VBUR is set higher, ABM will start at heavier output load conditions with higher peak primary current, so the benefit is higher light-load efficiency but the side effect is larger burst-mode output voltage ripple. Therefore, 50% to 60% of output load at high line is the recommended highest load condition to enter ABM (Io(BUR)) for both Si and GaN-based designs. The gain between VBUR and VCST(BUR) is a constant gain of KBUR-CST, so setting VCST(BUR) just requires properly selecting the resistor divider on the BUR pin formed by RBUR1 and RBUR2. VBUR should be set between 0.7 V and 2.4 V. If VBUR is less than 0.7 V, VCST(BUR) holds at 0.7 V / KBUR-CST. If VBUR is higher than 2.4 V, VCST(BUR) stays at 2.4 V / KBUR-CST.
In order to enhance the mode transition between ABM and LPM, a programmable offset voltage (ΔVBUR(LPM)) is generated on top of the VBUR setting in ABM through an internal 2.7-μA current source (IBUR(LPM)), as shown in Figure 7-1. In ABM, VBUR is set through the resistor voltage divider to fulfill the target average efficiency. On transition from ABM to LPM, IBUR(LPM) is enabled in LPM and flows out of the BUR pin, so ΔVBUR(LPM) can be programmed based on the Thevenin resistance on the BUR pin, which can be expressed as
When VBUR steps higher on transition into LPM, the initial peak magnetizing current in LPM is increased with larger energy per switching cycle in each burst packet. This increases the output voltage which forces higher feedback current to restore regulation. Higher feedback current causes UCC28781-Q1 to stay in LPM, forming a hysteresis effect. If ΔVBUR(LPM) is designed too small, it is possible that mode toggling between LPM and ABM can occur resulting in audible noise. For that situation, ΔVBUR(LPM) greater than 100 mV is recommended.
To minimize the effects of external noise coupling on VBUR, a filter capacitor on the BUR pin (CBUR) may be needed. CBUR needs to be properly designed to minimize the delay in generating ΔVBUR during mode transitions. It is recommended that CBUR should be sized small enough to ensure ΔVBUR(LPM) settles within 40 μs, corresponding to the burst frequency of 25 kHz in LPM (fLPM). Based on three RC time constants, representing 95% of a settled steady-state value from a step response, the design guide for CBUR is expressed as
In order to enhance the mode transition between ABM and AAM, a programmable offset voltage (ΔVBUR(AAM)) is generated to lower the VBUR with an internal 5-μA pull-down current (IBUR(AAM)), as shown in Figure 7-1. After transition from ABM to AAM, IBUR(AAM) is enabled in AAM and flows into the BUR pin, so ΔVBUR(AAM) is also programmed based on the Thevenin resistance on the BUR pin, which can be expressed as
When VBUR reduces after transition to AAM, the initial peak magnetizing current in AAM is reduced with less energy per switching cycle, which forces controller to continu operating in AAM. If ΔVBUR(AAM) is too small, it is possible that either mode toggling between ABM and AAM or low-frequency ABM burst packets less than 20 kHz can occur and result in audible noise concern. For that situation, ΔVBUR(AAM) greater than 150 mV is recommended. In some power stage designs, LPM in hard switching condition may cover a wider output load current range, so the light-load efficiency in LPM may be lower than ABM with ZVS condition. Besides, the ABM-to-AAM mode transition may be affected potentially when the load current condition of LPM-to-ABM transition is too close to the load current condition of ABM-to-AAM transition.
In order to optimize the output load current range in LPM, lower VBUR(ABM), smaller ΔVBUR(LPM), larger ROPP, and smaller CCS help to reduce the peak magnetizing current in LPM. If the LPM energy needs to be further reduced but VBUR in AAM is limited by the 0.7-V minimum programmable level, the optional application circuit in Figure 7-2 can be considered. When the output load current is reduced, duty cycle of each burst packet becomes smaller, so as the duty cycle of RUN-pin voltage. CBUR is discharged by the RUN driver through the small-signal diode (DBUR) and the current limit resistor (RRUN). Proper selection of RRUN value can further reduce VBUR(ABM) when the load current is reduced close to the transition point from ABM to LPM. One example BUR-pin setting is RBUR1 = 182 kΩ, RBUR2 = 37.4 kΩ, CBUR = 330 pF, and RRUN = 20 kΩ.