ZHCSOY9 december 2021 UCC28781
PRODUCTION DATA
The UCC28781 integrates two control concepts to benefit high-efficiency operation: peak current-mode control and burst-ripple control. The peak current loop in AAM can be analyzed based on linear control theory, so the compensation target is to obtain enough phase margin and gain margin for the given small-signal characteristic of a zero-voltage switching flyback converter. For transition-mode operation, the power stage can be modeled as a voltage-controlled current source charging an output capacitor (CO) with an equivalent-series resistance (RCo) and the output load (RO) as shown in Figure 8-2. The first-order plant characteristic and high switching frequency operation in AAM make the peak current loop easier to stabilize than when in ABM.
The adaptive burst mode (ABM) uses ripple-based control, so the linear control theory for AAM cannot be applied. As illustrated in Figure 7-4, the internal ramp compensation feature of the controller stabilizes the ABM control loop, so the external compensation network can be simplified.
The transfer function from IFB to VO guides the pole/zero placement of the general secondary-side compensation network in Figure 8-3. In the primary-side control circuitry, two poles at ωFB and ωOPTO introduce phase-delay on IFB. ωFB pole is formed by the external filter capacitor CFB and the parallel resistance of the internal RFBI and the external current-limiting resistor (RFB). ωOPTO pole is formed by the parasitic capacitance of the optocoupler output (COPTO) and the series resistance of RFBI and RFB. For CFB = 220 pF, RFBI = 8 KΩ, and RFB = 20 KΩ, the delay effect of ωFB pole located at 139 kHz is negligible. COPTO is in the range of a few nanoFarads contributed by the Miller effect of the collector-to-base capacitance of the BJT in the optocoupler output, so ωOPTO pole is located at less than 10 kHz.
If the control loop bandwidth needs to be designed at higher frequency for a faster transient response, the phase delay effect of ωOPTO on the stability margin must be taken into account. Therefore, an RC network (RDIFF and CDIFF) in parallel with RBIAS1 is used to compensate the phase-delay of the optocoupler, which introduces an extra pole/zero pair located at ωP1 and ωZ1 respectively. The basic design guide is to place the ωZ1 zero close to the ωOPTO pole, and to place ωP1 pole away from highest fBUR. On the other hand, if the stability margin and transient response are sufficient to meet the requirements without RDIFF and CDIFF, then these two components are optional for the controller.
The step-by-step design procedure of the compensator without RDIFF and CDIFF is: