ZHCSOY9 december   2021 UCC28781

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Description
      1. 7.3.1  BUR Pin (Programmable Burst Mode)
      2. 7.3.2  FB Pin (Feedback Pin)
      3. 7.3.3  REF Pin (Internal 5-V Bias)
      4. 7.3.4  VDD Pin (Device Bias Supply)
      5. 7.3.5  P13 and SWS Pins
      6. 7.3.6  S13 Pin
      7. 7.3.7  IPC Pin (Intelligent Power Control Pin)
      8. 7.3.8  RUN Pin (Driver and Bias Source for Isolator)
      9. 7.3.9  PWMH and AGND Pins
      10. 7.3.10 PWML and PGND Pins
      11. 7.3.11 SET Pin
      12. 7.3.12 RTZ Pin (Sets Delay for Transition Time to Zero)
      13. 7.3.13 RDM Pin (Sets Synthesized Demagnetization Time for ZVS Tuning)
      14. 7.3.14 XCD Pin
      15. 7.3.15 CS, VS, and FLT Pins
    4. 7.4 Device Functional Modes
      1. 7.4.1  Adaptive ZVS Control with Auto-Tuning
      2. 7.4.2  Dead-Time Optimization
      3. 7.4.3  EMI Dither and Dither Fading Function
      4. 7.4.4  Control Law Across Entire Load Range
      5. 7.4.5  Adaptive Amplitude Modulation (AAM)
      6. 7.4.6  Adaptive Burst Mode (ABM)
      7. 7.4.7  Low Power Mode (LPM)
      8. 7.4.8  First Standby Power Mode (SBP1)
      9. 7.4.9  Second Standby Power Mode (SBP2)
      10. 7.4.10 Startup Sequence
      11. 7.4.11 Survival Mode of VDD (INT_STOP)
      12. 7.4.12 System Fault Protections
        1. 7.4.12.1  Brown-In and Brown-Out
        2. 7.4.12.2  Output Over-Voltage Protection (OVP)
        3. 7.4.12.3  输入过压保护 (IOVP)
        4. 7.4.12.4  FLT 引脚上的过热保护 (OTP)
        5. 7.4.12.5  CS 引脚上的过热保护 (OTP)
        6. 7.4.12.6  可编程过功率保护 (OPP)
        7. 7.4.12.7  峰值功率限制 (PPL)
        8. 7.4.12.8  输出短路保护 (SCP)
        9. 7.4.12.9  过流保护 (OCP)
        10. 7.4.12.10 External Shutdown
        11. 7.4.12.11 Internal Thermal Shutdown
      13. 7.4.13 Pin Open/Short Protections
        1. 7.4.13.1 Protections on CS pin Fault
        2. 7.4.13.2 Protections on P13 pin Fault
        3. 7.4.13.3 Protections on RDM and RTZ pin Faults
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application Circuit
      1. 8.2.1 Design Requirements for a 60-W, 15-V ZVSF Bias Supply Application with a DC Input
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Bulk Capacitance and Minimum Bulk Voltage
        2. 8.2.2.2 Transformer Calculations
          1. 8.2.2.2.1 Primary-to-Secondary Turns Ratio (NPS)
          2. 8.2.2.2.2 Primary Magnetizing Inductance (LM)
          3. 8.2.2.2.3 Primary Winding Turns (NP)
          4. 8.2.2.2.4 Secondary Winding Turns (NS)
          5. 8.2.2.2.5 Auxiliary Winding Turns (NA)
          6. 8.2.2.2.6 Winding and Magnetic Core Materials
        3. 8.2.2.3 Calculation of ZVS Sensing Network
        4. 8.2.2.4 Calculation of BUR Pin Resistances
        5. 8.2.2.5 Calculation of Compensation Network
      3. 8.2.3 Application Curves
  10. Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1  General Considerations
      2. 10.1.2  RDM and RTZ Pins
      3. 10.1.3  SWS Pin
      4. 10.1.4  VS Pin
      5. 10.1.5  BUR Pin
      6. 10.1.6  FB Pin
      7. 10.1.7  CS Pin
      8. 10.1.8  AGND Pin
      9. 10.1.9  PGND Pin
      10. 10.1.10 Thermal Pad
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Receiving Notification of Documentation Updates
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 静电放电警告
    5. 11.5 术语表
  13. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

CS 引脚上的过热保护 (OTP)

如果 FLT 引脚已用于输入 OVP 检测,UCC28781 可在 CS 引脚上提供第三个和第四个 OTP 功能。这两种配置不会影响 CS 引脚和 OPP 电平上的电流检测信号,因为两个检测电路仅在 PWML 关闭后偏置。图 7-42 展示了两个应用电路。对于第三个 OTP 配置,当 PWMH 引脚被拉高时,RNTC 和 ROPP 构成一个电阻分压器,可在 CS 引脚上创建与温度相关的电压信号。当电压超过在退磁时间 (TDM) 结束前连续两个周期采样的 1.2V 阈值时,将触发 OTP 故障。OTP 检测电路不影响峰值电流环路的运行,因为 PWMH 在 PWML 导通时间持续时间内被拉至低电平。1.5s 长时计时器启动,控制器保持故障状态而无需切换。较长的恢复时间可实现温度迟滞,有助于在下一次 VO 重新启动尝试之前使热点温度降低。与 FLT 引脚上的第一个 OTP 配置相比,此配置允许在 AAM 和 ABM 中启动 OTP,因此仍可在大约 25% 的输出负载下触发 OTP。

采用小信号 PMOS 的第四个配置是覆盖宽输出负载范围的最全面方法。RUN 引脚用于偏置检测电路,PMOS 栅极由 PWML 引脚控制,仅在 PWML 为低电平时才允许进行检测。

GUID-77CFBCBC-8450-47DD-9580-C4C38D519CD5-low.gif图 7-42 用于在 CS 引脚上实现 OTP 的两个连接