10.1 Layout Guidelines

• In both buck and buck-boost low-side configurations, the copper area of the switching node DRAIN should be minimized to reduce EMI.
• Similarly, the copper area of the FB pin should be minimized to reduce coupling to feedback path. Loop C_L, Q1, R_FB1 should be minimized to reduce coupling to feedback path.
• In buck and buck-boost high side the GND, VDD and FB pins are all part of the switching node so the copper area connected with these pins should be minimized
• Minimum distance between 700-V coated traces is 1.41 mm (60 mils).

10.2 Layout Example

Figure 27 shows and example PCB layout for UCC28880 in low-side buck configuration.

Figure 27. UCC28880 Layout Example