Connection of Two Grounds: GND (analog ground) and PGND (power ground). Two grounds should be connected using a net tie right between GND pin and PGND pin at IC, and there should be only this connection between two grounds.
The bypass capacitors to the VDD pin and VREF pin should be as close as possible to the device GND.
The timing configuration pins RDEL, RTON, RTOFF, and RSLOPE are connected to the device GND as close as possible.
PGND should serve as the current return for the high current output drivers OUT and AUX. The current path should be as short as possible.
Connect PVDD and VDD using a 0ohm resistor right at IC of these two pins.