8.3.1.14 VDD

The VDD rail is the primary bias for the internal high-current gate drivers, the internal 5-V bias regulator and for parts of the undervoltage-lockout circuit. To reduce switching noise on the bias rail, a good-quality ceramic capacitor (C_HF) must be placed very closely between the VDD pin and PGND (pin 11) to provide adequate filtering. The recommended C_HF value is 1-μF for most applications but the value might be affected by the properties of the external-MOSFET transistors used in the power stage.

In addition to the low-impedance high-frequency filtering, the bias rail of the controller requires a larger value energy-storage capacitor (C_BIAS) connected parallel to C_HF. The energy-storage capacitor must provide the hold-up time to operate the UCC2897A (including gate-drive power requirements) during start up. In steady-state operation the controller must be powered from a bootstrap winding off the power transformer or by an auxiliary-bias supply. In case of an independent-auxiliary-bias supply, the energy storage is provided by the output capacitance of the bias supply. The capacitor values are also determined by the capacitor values connected to VREF. The capacitance on VREF and VDD should be in a minimum ratio of 1:10.