8.2.2.10.5 Setting the Switching Delays

Higher power designs will benefit from the adaptive delays provided by the ADS pin but that feature is not used in this example. Setting RADSH = 0 Ω defeats the adaptive delay and a fixed value for t_DELAB and t_DELCD is used. If it is planned to use the adaptive delay feature then the resistor RADSL should be included in the layout but not populated until delay optimisation is being done on actual hardware.

Figure 20. UCC3895 Adaptive Delays

We set the delay times as follows. The resonant frequency of the shim inductor L_S with the stray capacitance at the switched node is given by:

Equation 112.

Set the initial t_ABSET and t_CDSET values to half the resonant period

Equation 113.

The resistors R_AB and R_CD are given by a modified version of Equation 5 and Equation 6.

Equation 114.

It is important to recognise that the delay times set by R_AB and R_CD are those measured at the device pins. Propagation delays mean that the delay times seen at the primary of the transformer will be different and this is the reason why the delays have to be optimised on actual hardware. Once the prototype is up and running it is recommended that you fine tune t_ABSET and t_CDSET at light load. Refer to Figure 21 and Figure 22. It is easier to achieve ZVS at the drain of QD than at the drain of QA because the output inductor current reflected in the transformer primary is greater at QD and QC turn-off than it is at QA and QB turn-off.

Figure 21. t_ABSET to Achieve Valley Switching at Light Loads

Figure 22. t_CDSET to Achieve Valley Switching at Light Loads