The UCC44273 has internal Undervoltage Lockout (UVLO) protection feature on the V_DD-pin supply-circuit blocks. Whenever the driver is in UVLO condition (for example when V_DD voltage is less than V_ON during power up and when V_DD voltage is less than V_OFF during power down), this circuit holds all outputs LOW, regardless of the status of the inputs. The UVLO is typically 4.2 V with 300-mV typical hysteresis. This hysteresis helps prevent chatter when low V_DD – supply voltages have noise from the power supply and also when there are droops in the V_DD-bias voltage when the system commences switching and there is a sudden increase in I_DD. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging GaN wide-bandgap power-semiconductor devices.

For example, at power up, the UCC44273 driver output remains LOW until the V_DD voltage reaches the UVLO threshold. The magnitude of the OUT signal rises with V_DD until steady-state V_DD is reached. In the non-inverting operation (PWM signal applied to IN pin) shown in Figure 7-1, the output remains LOW until the UVLO threshold is reached, and then the output is in-phase with the input. Note that in these devices the output turns to high-state only if IN pin is high after the UVLO threshold is reached.

Because the driver draws current from the V_DD pin to bias all internal circuits, for the best high-speed circuit performance, two V_DD bypass capacitors are recommended to prevent noise problems. The use of surface-mount components is highly recommended. A 0.1-μF ceramic capacitor should be located as close as possible to the V_DD to GND pins of the gate driver. In addition, a larger capacitor (such as 1 μF) with relatively low ESR should be connected in parallel and close proximity, in order to help deliver the high-current peaks required by the load. The parallel combination of capacitors should present a low impedance characteristic for the expected current levels and switching frequencies in the application.

Figure 7-1 Power-Up (Non-Inverting Drive)