ZHCSKG7B June 2019 – February 2024 UCC5390-Q1
PRODUCTION DATA
The external gate-driver resistors, RG(ON) and RG(OFF) are used to:
The output stage has a pull-up structure consisting of a P-channel MOSFET and an N-channel MOSFET in parallel. The combined peak source current is 17 A for UCC5390-Q1 . Use Equation 1 to estimate the peak source current.
where
In this example, the peak source current is approximately 4.45 A as calculated in Equation 2.
Similarly, use Equation 3 to calculate the peak sink current.
where
In this example, the peak sink current is the minimum value between Equation 4 and 17 A.
The estimated peak current is also influenced by PCB layout and load capacitance. Parasitic inductance in the gate-driver loop can slow down the peak gate-drive current and introduce overshoot and undershoot. Therefore, TI strongly recommends that the gate-driver loop should be minimized. Conversely, the peak source and sink current is dominated by loop parasitics when the load capacitance (CISS) of the power transistor is very small (typically less than 1 nF) because the rising and falling time is too small and close to the parasitic ringing period.