The power dissipated in UCC5880-Q1 is directly proportional to the VCC1, VCC2, and VEE2
voltages, capacitive loading, and switching frequency. Proper PCB layout helps
dissipate heat from the device to the PCB and minimize junction to board thermal
impedance
(θJB).
Increasing the PCB copper connecting to VCC2 and VEE2 planes is recommended,
with priority on maximizing the connection to VEE2.
If there are multiple layers in the system, it is also recommended to connect
the VCC2 and VEE2 to their respective internal planes using multiple vias of adequate
size. However, it is still critical to ensure that there are not any traces/planes from
different high voltage planes overlapping.