ZHCSAY5D march 2013 – april 2021 UCD3138064
PRODUCTION DATA
The UCD3138x has two independent interfaces which both support PMBus and I2C in master and slave modes. Only one of the interfaces has control of the address pin current sources as well as support for the optional Control and Alert lines described in the PMBus specification. Other than these differences, the interfaces are identical.
The PMBus/I2C interface is designed to minimize the processor overhead required for interface. It can automatically detect and acknowledge addresses. It handles start and stop conditions automatically, and can clock stretch until the processor has time to poll the PMBus status. It will automatically receive and send up to 4 bytes at a time. It can automatically verify and generate a PEC. This means that a write byte command can be received by the processor with only one function call. There is no need for any interrupts at all with this PMBus/I2C interface. If it is polled every few milliseconds, it will work perfectly.
The interface also supports automatic ACK of two independent addresses. If both PMBus/I2C interfaces are used at the same time a total of 4 independent addresses can be automatically detected.
Example: PMBus Address Decode via ADC12 Reading
The user can allocate 2 pins of the 12-bit ADC input channels, AD_00 and AD_01, for PMBus address decoding. At power-up the device applies IBIAS to each address detect pin and the voltage on that pin is captured by the internal 12-bit ADC.
PMBus/I2C address 0x7E is a reserved address and should not be used in a system using the UCD3138x. This address is used for manufacturing test.