SLUSC99A July   2016  – January 2017 UCD3138128A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 PMBus/SMBus/I2C Timing
    8. 7.8 Typical Characteristics
    9. 7.9 Timing Diagrams
  8. 8 Parametric Measurement Information
    1. 8.1 Typical Clock Gating Power Savings
  9. 9 Detailed Description
    1. 9.1 Overview
      1. 9.1.1 ARM Processor
      2. 9.1.2 Memory
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  System Module
        1. 9.3.1.1 Address Decoder (DEC)
        2. 9.3.1.2 Memory Management Controller (MMC)
        3. 9.3.1.3 System Management (SYS)
        4. 9.3.1.4 Central Interrupt Module (CIM)
      2. 9.3.2  Peripherals
        1. 9.3.2.1 Digital Power Peripherals (DPPs)
          1. 9.3.2.1.1 Front End
          2. 9.3.2.1.2 DPWM Module
          3. 9.3.2.1.3 DPWM Events
          4. 9.3.2.1.4 High Resolution DPWM
          5. 9.3.2.1.5 Oversampling
          6. 9.3.2.1.6 DPWM Interrupt Generation
          7. 9.3.2.1.7 DPWM Interrupt Scaling/Range
          8. 9.3.2.1.8 Synchronous Rectifier Dead Time Optimization Peripheral
      3. 9.3.3  Automatic Mode Switching
        1. 9.3.3.1 Phase Shifted Full Bridge Example
        2. 9.3.3.2 LLC Example
        3. 9.3.3.3 Mechanism For Automatic Mode Switching
      4. 9.3.4  DPWMC, Edge Generation, Intramux
      5. 9.3.5  Synchronous Rectifier MOSFET Ramp And IDE Calculation
      6. 9.3.6  Filter
        1. 9.3.6.1 Loop Multiplexer
        2. 9.3.6.2 Fault Multiplexer
      7. 9.3.7  Communication Ports
        1. 9.3.7.1 SCI (UART) Serial Communication Interface
        2. 9.3.7.2 PMBUS/I2C
          1. 9.3.7.2.1 Example: PMBus Address Decode via ADC12 Reading
        3. 9.3.7.3 SPI
        4. 9.3.7.4 JTAG Standard Interface
      8. 9.3.8  Real Time Clock
      9. 9.3.9  External Crystal Interface
      10. 9.3.10 Timers
        1. 9.3.10.1 24-Bit Timer
        2. 9.3.10.2 16-Bit PWM Timers
        3. 9.3.10.3 Watchdog Timer
      11. 9.3.11 General Purpose ADC12
      12. 9.3.12 Miscellaneous Analog
      13. 9.3.13 Brownout
      14. 9.3.14 Global I/O
      15. 9.3.15 Temperature Sensor Control
      16. 9.3.16 I/O Mux Control
      17. 9.3.17 Current Sharing Control
      18. 9.3.18 Temperature Reference
    4. 9.4 Device Functional Modes
      1. 9.4.1 DPWM Modes of Operation
        1. 9.4.1.1 Normal Mode
        2. 9.4.1.2 DPWM Multiple Output Mode
        3. 9.4.1.3 DPWM Resonant Mode
        4. 9.4.1.4 Triangular Mode
        5. 9.4.1.5 Leading Edge Mode
        6. 9.4.1.6 Phase Shifting
    5. 9.5 Register Maps
      1. 9.5.1 CPU Memory Map And Interrupts
        1. 9.5.1.1 Memory Map (After Reset Operation)
        2. 9.5.1.2 Memory Map (Normal Operation)
        3. 9.5.1.3 Memory Map (System And Peripherals Blocks)
      2. 9.5.2 Boot ROM
        1. 9.5.2.1 Pseudo Code for ROM
      3. 9.5.3 Customer Boot Program
      4. 9.5.4 Flash Management
  10. 10Applications and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 PCMC (Peak Current Mode Control) PSFB (Phase Shifted Full Bridge) Hardware Configuration Overview
        2. 10.2.2.2 DPWM Initialization for PSFB
        3. 10.2.2.3 DPWM Synchronization
        4. 10.2.2.4 Fixed Signals to Bridge
        5. 10.2.2.5 Dynamic Signals to Bridge
      3. 10.2.3 System Initialization for PCM
        1. 10.2.3.1 Use of Front Ends and Filters in PSFB
        2. 10.2.3.2 Peak Current Detection
        3. 10.2.3.3 Peak Current Mode (PCM)
      4. 10.2.4 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Device Grounding and Layout Guidelines
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
        1. 13.2.1.1 References
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Device Comparison

Table 1. Product Family Comparison

UCD
FEATURE 3138
3138A
RHA/RMH 		3138064
3138064A
RMH 		3138
3138A
RGC		 3138064
3138064A
RGC 		3138064
RGZ		 3138128
3138128A
PFC		 3138A64
PFC
Package Offering 40 Pin QFN
(6mm x 6mm)		 40 Pin QFN
(6mm x 6mm)		 64 Pin QFN
( 9mm x 9mm)		 64 Pin QFN
(9mm x 9mm)		 48 Pin QFN
(7mm x 7mm)		 80 Pin QFP
(14mm x 14mm)
(Includes leads)		 80 Pin QFP
(14mm x 14mm)
(Includes leads)
ARM7TDMI-S Core Processor 31.25 MHz 31.25 MHz 31.25 MHz 31.25 MHz 31.25 MHz 31.25 MHz 31.25 MHz
High Resolution DPWM Outputs (250ps Resolution) 8 8 8 8 8 8 8
Number of High Speed Independent Feedback Loops (# Regulated Output Voltages 3 3 3 3 3 3 3
12-bit, 256kps, General Purpose ADC Channels 7 7 14 14 9 15 15
Digital Comparators at ADC Outputs 4 4 4 4 4 4 4
Flash Memory (Program) 32 kB 64 kB 32 kB 64 kB 64 kB 128 kB 64 kB
Number of Memory 32kB Flash Memory Banks 1 2 1 2 2 4 Only 1 bank of 64 kB Flash available
Flash Memory (Data) 2 kB 2 kB 2 kB 2 kB 2 kB 2 kB 2 kB
RAM 4 kB 4 kB 4 kB 4 kB 4 kB 8 kB 8 kB
Programmable Fault Inputs 1 + 2(1) 1 + 2(1) 4 2 + 2(1) 1 + 2(1) 4 4
High Speed Analog Comparators with Cycle-by-Cycle Current Limiting 6 6 7 7 6 7 7
UART (SCI) 1(1) 1(1) 2 2 2 2 2
PMBus/I2C 1 1 1 1 1 1 1
Additional I2C 0 0 0 1(1) 1(1) 1 1
SPI 0 0 0 1(1) 1(1) 1 1
Timers 4 (16 bit) and
1 (24 bit)		 4 (16 bit) and
1 (24 bit)		 4 (16 bit) and
1 (24 bit)		 4 (16 bit) and
1 (24 bit)		 4 (16 bit) and
1 (24 bit)		 4 (16 bit) and
2 (24 bit)		 4 (16 bit) and
2 (24 bit)
Timer PWM Outputs 1(1) 1(1) 2 2 1(1) 4 4
Timer Capture Inputs 2(1) 2(1) 1 + 3(1) 1 + 3(1) 2(1) 2 + 2(1) 2 + 2(1)
Total Digital GPIOs 18 18 30 30 24 43 43
External Interrupts 0 0 1 1 0 1 1
External Crystal Clock Support no no no no no Yes (pins #61, 62) Yes (pins #61, 62)
Peak Current Mode Control EADC2 Only All EADC channels EADC Only All EADC channels All EADC Channels All EADC Channels All EADC Channels
(1) Represents an alternate pin out that is programmable via firmware.

Table 2. Device Feature Information

FEATURE UCD3138128A 80 PIN
ARM7TDMI-S Core Processor 31.25 MHz
High Resolution DPWM Outputs (250ps Resolution) 8
Number of High Speed Independent Feedback Loops (# Regulated Output Voltages) 3
12-bit, 539 ksps, General Purpose ADC Channels 15
Digital Comparators at ADC Outputs 4
Flash Memory (Program) 128 kB
Flash Memory (Data) 2 kB
Flash Security √
RAM 8 kB
DPWM Switching Frequency up to 2 MHz
Programmable Fault Inputs 4
High Speed Analog Comparators with Cycle-by-Cycle Current Limiting 7
UART (SCI) 2
PMBus 1
I2C 1
SPI 1
Timers 4 (16 bit) and 2 (24 bit)
Timer PWM Outputs 4
Timer Capture Inputs 2
Watchdog √
On Chip Oscillator √
Power-On Reset and Brown-Out Detector √
Sync IN and Sync OUT Functions √
Total GPIO (includes all pins with multiplexed functions such as, DPWM, Fault Inputs, SCI, etc.) 43
External Interrupts 1
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