ZHCSDJ8A March   2015  – April 2015 UCD3138A

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用范围
    3. 1.3 说明
    4. 1.4 功能方框图
  2. 2修订历史记录
  3. 3Device Comparison
    1. 3.1 Product Selection Matrix
  4. 4Terminal Configuration and Functions
    1. 4.1 UCD3138ARGC Package
    2. 4.2 UCD3138ARMH Package
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Thermal Characteristics
    6. 5.6 PMBus/SMBus/I2C Timing
    7. 5.7 Parametric Measurements Information
    8. 5.8 Peripherals
      1. 5.8.1 Digital Power Peripherals (DPPs)
        1. 5.8.1.1 Front End
        2. 5.8.1.2 DPWM Module
        3. 5.8.1.3 DPWM Events
        4. 5.8.1.4 High Resolution DPWM
        5. 5.8.1.5 Oversampling
        6. 5.8.1.6 DPWM Interrupt Generation
        7. 5.8.1.7 DPWM Interrupt Scaling/Range
        8. 5.8.1.8 Synchronous Rectifier Dead Time Optimization Peripheral
    9. 5.9 Typical Temperature Characteristics
  6. 6Detailed Description
    1. 6.1  Overview
    2. 6.2  ARM Processor
    3. 6.3  Memory
      1. 6.3.1 CPU Memory Map and Interrupts
        1. 6.3.1.1 Memory Map (After Reset Operation)
        2. 6.3.1.2 Memory Map (Normal Operation)
        3. 6.3.1.3 Memory Map (System and Peripherals Blocks)
      2. 6.3.2 Boot ROM
      3. 6.3.3 Customer Boot Program
      4. 6.3.4 Flash Management
    4. 6.4  System Module
      1. 6.4.1 Address Decoder (DEC)
      2. 6.4.2 Memory Management Controller (MMC)
      3. 6.4.3 System Management (SYS)
      4. 6.4.4 Central Interrupt Module (CIM)
    5. 6.5  DPWM Modes of Operation
      1. 6.5.1 Normal Mode
      2. 6.5.2 DPWM Multiple Output Mode
      3. 6.5.3 DPWM Resonant Mode
      4. 6.5.4 Triangular Mode
      5. 6.5.5 Leading Edge Mode
    6. 6.6  Sync FET Ramp and IDE Calculation
    7. 6.7  Automatic Mode Switching
      1. 6.7.1 Phase Shifted Full Bridge Example
      2. 6.7.2 LLC Example
      3. 6.7.3 Mechanism for Automatic Mode Switching
    8. 6.8  DPWMC, Edge Generation, IntraMux
    9. 6.9  Filter
      1. 6.9.1 Loop Multiplexer
      2. 6.9.2 Fault Multiplexer
    10. 6.10 Communication Ports
      1. 6.10.1 SCI (UART) Serial Communication Interface
      2. 6.10.2 PMBUS
      3. 6.10.3 General Purpose ADC12
      4. 6.10.4 Timers
        1. 6.10.4.1 24-bit PWM Timer
        2. 6.10.4.2 16-Bit PWM Timers
        3. 6.10.4.3 Watchdog Timer
    11. 6.11 Miscellaneous Analog
    12. 6.12 Package ID Information
    13. 6.13 Brownout
    14. 6.14 Global I/O
    15. 6.15 Temperature Sensor Control
    16. 6.16 I/O Mux Control
    17. 6.17 Current Sharing Control
    18. 6.18 Temperature Reference
  7. 7Application, Implementation, and Layout
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 PCMC (Peak Current Mode Control) PSFB (Phase-Shifted Full Bridge) Hardware Configuration Overview
        2. 7.2.2.2 DPWM Initialization for PSFB
      3. 7.2.3 DPWM Synchronization
      4. 7.2.4 Fixed Signals to Bridge
      5. 7.2.5 Dynamic Signals to Bridge
      6. 7.2.6 System Initialization for PCM
        1. 7.2.6.1 Use of Front Ends and Filters in PSFB
        2. 7.2.6.2 Peak Current Detection
        3. 7.2.6.3 Peak Current Mode (PCM)
      7. 7.2.7 Application Performance Plots
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
    4. 7.4 Power Supply Decoupling and Bulk Capacitors
  8. 8器件和文档支持
    1. 8.1 器件支持
      1. 8.1.1 开发支持
        1. 8.1.1.1 工具和文档
        2. 8.1.1.2 开发套件
      2. 8.1.2 器件命名规则
    2. 8.2 文档支持
      1. 8.2.1 参考文档
      2. 8.2.2 社区资源
    3. 8.3 商标
    4. 8.4 静电放电警告
    5. 8.5 Export Control Notice
    6. 8.6 Glossary
  9. 9机械封装和可订购信息
    1. 9.1 Via Channel
    2. 9.2 封装信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Terminal Configuration and Functions

4.1 UCD3138ARGC Package

64 QFN PACKAGE
TOP VIEW
UCD3138A po64_qfn_lusc66.gif

Table 4-1 UCD3138ARGC Terminal Functions

PIN NO. NAME PRIMARY ASSIGNMENT ALTERNATE ASSIGNMENT CONFIGURABLE
AS A GPIO?
NO. 1 NO. 2 NO. 3 NO. 4
1 AGND Analog ground
2 AD13 12-bit ADC, Ch 13, comparator E, I-share DAC output
3 AD12 12-bit ADC, Ch 12
4 AD10 12-bit ADC, Ch 10
5 AD07 12-bit ADC, Ch 7, Connected to comparator F and reference to comparator G DAC output
6 AD06 12-bit ADC, Ch 6, Connected to comparator F DAC output
7 AD04 12-bit ADC, Ch 4, Connected to comparator D DAC output
8 AD03 12-bit ADC, Ch 3, Connected to comparator B and C
9 V33DIO Digital I/O 3.3V core supply
10 DGND Digital ground
11 RESET Device Reset Input, active low
12 ADC_EXT_TRIG ADC conversion external trigger input TCAP SYNC PWM0 Yes
13 SCI_RX0 SCI RX 0 Yes
14 SCI_TX0 SCI TX 0 Yes
15 PMBUS_CLK PMBUS Clock (Open Drain) SCI TX 0 Yes
16 PMBUS_DATA PMBus data (Open Drain) SCI RX 0 Yes
17 DPWM0A DPWM 0A output Yes
18 DPWM0B DPWM 0B output Yes
19 DPWM1A DPWM 1A output Yes
20 DPWM1B DPWM 1B output Yes
21 DPWM2A DPWM 2A output Yes
22 DPWM2B DPWM 2B output Yes
23 DPWM3A DPWM 3A output Yes
24 DPWM3B DPWM 3B output Yes
25 DGND Digital ground
26 SYNC DPWM Synchronize pin TCAP ADC_EXT_TRIG PWM0 DTC1 Yes
27 PMBUS_ALERT PMBus Alert (Open Drain) Yes
28 PMBUS_CTRL PMBus Control (Open Drain) Yes
29 SCI_TX1 SCI TX 1 PMBUS_ALERT Yes
30 SCI_RX1 SCI RX 1 PMBUS_CTRL Yes
31 PWM0 General purpose PWM 0 Yes
32 PWM1 General purpose PWM 1 Yes
33 DGND Digital ground
34 INT_EXT External Interrupt Yes
35 FAULT0 External fault input 0 Yes
36 FAULT1 External fault input 1 Yes
37 TCK JTAG TCK TCAP SYNC PWM0 DTC0 Yes
38 TDO JTAG TDO SCI_TX0 PMBUS_ALERT FAULT0 DTC1 Yes
39 TDI JTAG TDI SCI_RX0 PMBUS_CTRL FAULT1 DTC0 Yes
40 TMS JTAG TMS Yes
41 TCAP Timer capture input Yes
42 FAULT2 External fault input 2 Yes
43 FAULT3 External fault input 3 Yes
44 DGND Digital ground
45 V33DIO Digital I/O 3.3V core supply
46 BP18 1.8V Bypass
47 V33D Digital 3.3V core supply
48 AGND Substrate analog ground
49 AGND Analog ground
50 EAP0 Channel 0, differential analog voltage, positive input
51 EAN0 Channel 0, differential analog voltage, negative input
52 EAP1 Channel 1, differential analog voltage, positive input
53 EAN1 Channel 1, differential analog voltage, negative input
54 EAP2 Channel 2, differential analog voltage, positive input
(Recommended for peak currrent mode control)
55 EAN2 Channel #2, differential analog voltage, negative input
56 AGND Analog ground
57 V33A Analog 3.3-V supply
58 AD00 12-bit ADC, Ch 0, Connected to current source
59 AD01 12-bit ADC, Ch 1, Connected to current source
60 AD02 12-bit ADC, Ch 2, Connected to comparator A, I-share
61 AD05 12-bit ADC, Ch 5
62 AD08 12-bit ADC, Ch 8
63 AD09 12-bit ADC, Ch 9
64 AD11 12-bit ADC, Ch 11

4.2 UCD3138ARMH Package

40 QFN PACKAGE
With Corner Anchors Pin Attributes
TOP VIEW
UCD3138A po40_RMH_qfn_lusc66.gif
NOTE: The RMH package has thinner package height compared to the RHA package. There are also four corner pins on the RMH package. These features help to improve solder-joint reliability. The corner anchor pins and thermal pad should be soldered for robust mechanical performance and should be tied to the appropriate ground signal.

Table 4-2 UCD3138ARMH Terminal Functions

PIN NO. NAME PRIMARY ASSIGNMENT ALTERNATE ASSIGNMENT CONFIGURABLE
AS A GPIO?
NO. 1 NO. 2 NO. 3 NO. 4
1 AGND Analog ground
2 AD13 12-bit ADC, Ch 13, Connected to comparator E, I-share
3 AD06 12-bit ADC, Ch 6, Connected to comparator F
4 AD04 12-bit ADC, Ch 4, Connected to comparator D
5 AD03 12-bit ADC, Ch 3, Connected to comparator B and C
6 DGND Digital ground
7 RESET Device Reset Input, active low
8 ADC_EXT_TRIG ADC conversion external trigger input TCAP SYNC PWM0 Yes
9 PMBUS_CLK PMBUS Clock (Open Drain) SCI_TX0 Yes
10 PMBUS_DATA PMBus data (Open Drain) SCI_RX0 Yes
11 DPWM0A DPWM 0A output Yes
12 DPWM0B DPWM 0B output Yes
13 DPWM1A DPWM 1A output Yes
14 DPWM1B DPWM 1B output Yes
15 DPWM2A DPWM 2A output Yes
16 DPWM2B DPWM 2B output Yes
17 DWPM3A DPWM 3A output Yes
18 DPWM3B DPWM 3B output Yes
19 PMBUS_ALERT PMBus Alert (Open Drain) Yes
20 PMBUS_CTRL PMBus Control (Open Drain) Yes
21 TCK JTAG TCK TCAP SYNC PWM0 DTC0 Yes
22 TDO JTAG TDO SCI_TX0 PMBUS_ALERT FAULT0 DTC1 Yes
23 TDI JTAG TDI SCI_RX0 PMBUS_CTRL FAULT1 DTC0 Yes
24 TMS JTAG TMS Yes
25 FAULT2 External fault input 2 Yes
26 DGND Digital ground
27 V33D Digital 3.3V core supply
28 BP18 1.8V Bypass
29 AGND Substrate analog ground
30 AGND Analog ground
31 EAP0 Channel 0, differential analog voltage, positive input
32 EAN0 Channel 0, differential analog voltage, negative input
33 EAP1 Channel 1, differential analog voltage, positive input
34 EAN1 Channel 1, differential analog voltage, negative input
35 EAP2 Channel 2, differential analog voltage, positive input
(Recommended for peak currrent mode control)
36 AGND Analog ground
37 V33A Analog 3.3-V supply
38 AD00 12-bit ADC, Ch 0, Connected to current source
39 AD01 12-bit ADC, Ch 1, Connected to current source
40 AD02 12-bit ADC, Ch 2, Connected to comparator A, I-share
Corner
NA		 Corner
anchor pin		 All four anchors should be soldered and tied to GND
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