ZHCSOV0E March   2005  – November 2021 UCD7100

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. 说明(续)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 Handling Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input
      2. 9.3.2 Current Sensing and Protection
      3. 9.3.3 Handshaking
      4. 9.3.4 Driver Output
      5. 9.3.5 Source/Sink Capabilities During Miller Plateau
      6. 9.3.6 Drive Current and Power Requirements
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation with VDD < 4.25 V (minimum VDD)
      2. 9.4.2 Operation with IN Pin Open
      3. 9.4.3 Operation with ILIM Pin Open
      4. 9.4.4 Operation with ILIM Pin High
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
    1. 11.1 Supply
    2. 11.2 Reference and External Bias Supply
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 第三方米6体育平台手机版_好二三四免责声明
    3. 13.3 Documentation Support
      1. 13.3.1 Related Documentation
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 支持资源
    6. 13.6 Trademarks
    7. 13.7 术语表
    8. 13.8 Electrostatic Discharge Caution
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PWP|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

Driver Output

The high-current output stage of the UCD7K device family is capable of supplying ±4-A peak current pulses and swings to both VDD and GND. The driver outputs follows the state of the IN pin provided that the VDD and 3V3 voltages are above their respective under-voltage lockout threshold.

The drive output utilizes Texas Instruments’ TrueDrive™ architecture, which delivers rated current into the gate of a MOSFET when it is most needed during the Miller plateau region of the switching transition providing efficiency gains.

TrueDrive™ consists of pullup/ pulldown circuits using bipolar and MOSFET transistors in parallel. The peak output current rating is the combined current from the bipolar and MOSFET transistors. The output resistance is the RDS(on) of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor. This hybrid output stage also allows efficient current sourcing at low supply voltages.

Each output stage also provides a very low impedance to overshoot and undershoot due to the body diode of the external MOSFET. This means that in many cases, external-schottky-clamp diodes are not required.