7 Pin Configuration and Functions

Figure 7-1 PWP14 PINSTop View

Table 7-1 Pin Functions

UCD7100		PIN NAME	TYPE	FUNCTION
HTSSOP-14 PIN NO.	DFN-14 PIN NO.	PIN NAME	TYPE	FUNCTION
1	1	VDD	I	Supply input pin to power the driver. The UCD7K devices accept an input range of 4.25 V to 15 V. Bypass the pin with at least 4.7 µF of capacitance.
2	2	IN	I	The IN pin is a high impedance digital input capable of accepting 3.3-V logic level signals up to 2 MHz. There is an internal Schmitt trigger comparator which isolates the internal circuitry from any external noise.
3	3	3V3	O	Regulated 3.3-V rail. The onboard linear voltage regulator is capable of sourcing up to 10 mA of current. Place 0.22-µF of ceramic capacitance from the pin to ground.
4	4	AGND	—	Analog ground return.
5	5	CLF	O	Current limit flag. When the CS level is greater than the ILIM voltage minus 25 mV, the output of the driver is forced low and the current limit flag (CLF) is set high. The CLF signal is latched high until the UCD7K device receives the next rising edge on the IN pin.
6	6	ILIM	I	Current limit threshold set pin. The current limit threshold can be set to any value between 0.25 V and 1.0 V.
7	7	NC	—	No Connection.
8	8	CS	I	Current sense pin. Fast current limit comparator connected to the CS pin is used to protect the power stage by implementing cycle-by-cycle current limiting.
9	9	PGND	—	Power ground return. Connect the two PGNDs together. These ground pins should be connected very closely to the source of the power MOSFET.
10	10	PGND	—	Power ground return. Connect the two PGNDs together. These ground pins should be connected very closely to the source of the power MOSFET.
11	11	OUT	O	The high-current TrueDrive™ driver output. Connect the two OUT pins together.
12	12	OUT	O	The high-current TrueDrive™ driver output. Connect the two OUT pins together.
13	13	PVDD	I	Supply pin provides power for the output drivers. It is not connected internally to the VDD supply rail. Connect the two PVDD pins together.
14	14	PVDD	I	Supply pin provides power for the output drivers. It is not connected internally to the VDD supply rail. Connect the two PVDD pins together.