8.4.8 Watchdog Timer

The UCD90320U device provides a watchdog timer (WDT). The WDT can be reset by toggling a watchdog input (WDI) pin. If WDI is not toggled within a programmed period, the WDT times out. As a result, a watchdog output (WDO) pin is asserted (generates a pulse) in order to provide a system-reset signal.

The WDI and WDO pins are GPIO pins and are only optional. The WDI can be replaced by SYSTEM_WATCHDOG_RESET command sent over PMBus. The WDO can be manifested through the Boolean Logic defined GPOs, or its function can be integrated into the system reset pin (RESET) configured in the system reset function. See also the System Reset Function section.

The WDT timer is programmable from 0.001 s to 258.048 s. See also the UCD90320U Sequencer and System Health Controller PMBus Command Reference user guide for details on configuring the watchdog timer.

After a timeout, the WDT can be restarted by toggling the WDI pin or by writing a SYSTEM_WATCHDOG_RESET command over PMBus. Figure 25 shows the watchdog timing waveforms.

Figure 25. Watchdog Timer Operation Timing Diagram

The WDT can be active immediately at power up or after an initial wait time. These are the programmable wait times options that determine when the WDT operation begins.

• 100 ms
• 200 ms
• 400 ms
• 800 ms
• 1.6 s
• 3.2 s
• 6.4 s
• 12.8 s
• 25.6 s
• 51.2 s
• 102.4 s
• 204.8 s
• 409.6 s
• 819.2 s
• 1638.4 s